Merge remote branch 'origin/modesetting-gem' into modesetting-gem
commit
7b3aa62648
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@ -419,6 +419,7 @@ void atombios_crtc_mode_set(struct drm_crtc *crtc,
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atombios_set_crtc_dtd_timing(crtc, &crtc_dtd_timing);
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}
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radeon_crtc_set_base(crtc, x, y);
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radeon_legacy_atom_set_surface(crtc);
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}
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}
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@ -277,8 +277,10 @@ bool radeon_get_atom_connector_info_from_bios_connector_table(struct drm_device
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union atom_supported_devices *supported_devices;
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int i,j;
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if (radeon_get_atom_connector_info_from_bios_object_table(dev))
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return true;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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// FIXME this should return false for pre-r6xx chips
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if (radeon_get_atom_connector_info_from_bios_object_table(dev))
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return true;
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atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
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@ -195,7 +195,7 @@ static void radeon_crtc_init(struct drm_device *dev, int index)
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radeon_crtc->lut_b[i] = i;
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}
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if (dev_priv->is_atom_bios)
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if (dev_priv->is_atom_bios && (radeon_is_avivo(dev_priv) || radeon_r4xx_atom))
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radeon_atombios_init_crtc(dev, radeon_crtc);
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else
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radeon_legacy_init_crtc(dev, radeon_crtc);
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@ -237,7 +237,10 @@ bool radeon_setup_enc_conn(struct drm_device *dev)
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encoder = NULL;
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/* if we find an LVDS connector */
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if (mode_info->bios_connector[i].connector_type == CONNECTOR_LVDS) {
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encoder = radeon_encoder_lvtma_add(dev, i);
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if (radeon_is_avivo(dev_priv) || radeon_r4xx_atom)
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encoder = radeon_encoder_lvtma_add(dev, i);
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else
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encoder = radeon_encoder_legacy_lvds_add(dev, i);
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if (encoder)
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drm_mode_connector_attach_encoder(connector, encoder);
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}
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@ -246,7 +249,14 @@ bool radeon_setup_enc_conn(struct drm_device *dev)
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if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
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(mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_A) ||
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(mode_info->bios_connector[i].connector_type == CONNECTOR_VGA)) {
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encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 0);
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if (radeon_is_avivo(dev_priv) || radeon_r4xx_atom)
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encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 0);
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else {
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if (mode_info->bios_connector[i].dac_type == DAC_PRIMARY)
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encoder = radeon_encoder_legacy_primary_dac_add(dev, i, 0);
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else if (mode_info->bios_connector[i].dac_type == DAC_TVDAC)
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encoder = radeon_encoder_legacy_tv_dac_add(dev, i, 0);
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}
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if (encoder)
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drm_mode_connector_attach_encoder(connector, encoder);
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}
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@ -254,14 +264,26 @@ bool radeon_setup_enc_conn(struct drm_device *dev)
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/* TMDS on DVI */
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if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
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(mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_D)) {
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encoder = radeon_encoder_atom_tmds_add(dev, i, mode_info->bios_connector[i].tmds_type);
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if (radeon_is_avivo(dev_priv) || radeon_r4xx_atom)
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encoder = radeon_encoder_atom_tmds_add(dev, i, mode_info->bios_connector[i].tmds_type);
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else {
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if (mode_info->bios_connector[i].tmds_type == TMDS_INT)
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encoder = radeon_encoder_legacy_tmds_int_add(dev, i);
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else if (mode_info->bios_connector[i].tmds_type == TMDS_EXT)
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encoder = radeon_encoder_legacy_tmds_ext_add(dev, i);
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}
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if (encoder)
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drm_mode_connector_attach_encoder(connector, encoder);
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}
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/* TVDAC on DIN */
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if (mode_info->bios_connector[i].connector_type == CONNECTOR_DIN) {
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encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 1);
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if (radeon_is_avivo(dev_priv) || radeon_r4xx_atom)
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encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 1);
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else {
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if (mode_info->bios_connector[i].dac_type == DAC_TVDAC)
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encoder = radeon_encoder_legacy_tv_dac_add(dev, i, 0);
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}
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if (encoder)
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drm_mode_connector_attach_encoder(connector, encoder);
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}
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@ -38,6 +38,7 @@
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int radeon_no_wb;
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int radeon_dynclks = 1;
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int radeon_r4xx_atom = 0;
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MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers\n");
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module_param_named(no_wb, radeon_no_wb, int, 0444);
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@ -48,6 +49,9 @@ module_param_named(modeset, radeon_modeset, int, 0400);
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MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
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module_param_named(dynclks, radeon_dynclks, int, 0444);
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MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
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module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
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static int dri_library_name(struct drm_device * dev, char * buf)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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@ -768,8 +768,8 @@ static void atombios_tmds2_setup(struct drm_encoder *encoder,
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}
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static void atombios_ext_tmds_setup(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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void atombios_ext_tmds_setup(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_radeon_private *dev_priv = dev->dev_private;
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@ -172,7 +172,7 @@ void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)
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}
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/* properly set crtc bpp when using atombios */
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static void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
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void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_radeon_private *dev_priv = dev->dev_private;
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@ -312,9 +312,6 @@ static bool radeon_set_crtc1_base(struct drm_crtc *crtc, int x, int y)
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disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
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RADEON_WRITE(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
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if (dev_priv->is_atom_bios)
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radeon_legacy_atom_set_surface(crtc);
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return true;
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}
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@ -736,9 +733,6 @@ static bool radeon_set_crtc2_base(struct drm_crtc *crtc, int x, int y)
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disp2_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
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RADEON_WRITE(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);
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if (dev_priv->is_atom_bios)
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radeon_legacy_atom_set_surface(crtc);
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return true;
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}
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@ -923,33 +923,40 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder,
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struct drm_radeon_private *dev_priv = dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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uint32_t fp2_gen_cntl = RADEON_READ(RADEON_FP2_GEN_CNTL);
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uint32_t fp2_gen_cntl;
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DRM_DEBUG("\n");
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if (radeon_crtc->crtc_id == 0)
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radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
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if (1) // FIXME rgbBits == 8
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fp2_gen_cntl |= RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */
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else
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fp2_gen_cntl &= ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format, */
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if (dev_priv->is_atom_bios) {
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atombios_ext_tmds_setup(encoder, adjusted_mode);
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fp2_gen_cntl = RADEON_READ(RADEON_FP2_GEN_CNTL);
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} else {
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fp2_gen_cntl = RADEON_READ(RADEON_FP2_GEN_CNTL);
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fp2_gen_cntl &= ~(RADEON_FP2_ON |
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RADEON_FP2_DVO_EN |
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RADEON_FP2_DVO_RATE_SEL_SDR);
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/* XXX: these are oem specific */
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if (radeon_is_r300(dev_priv)) {
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if ((dev->pdev->device == 0x4850) &&
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(dev->pdev->subsystem_vendor == 0x1028) &&
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(dev->pdev->subsystem_device == 0x2001)) /* Dell Inspiron 8600 */
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fp2_gen_cntl |= R300_FP2_DVO_CLOCK_MODE_SINGLE;
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if (1) // FIXME rgbBits == 8
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fp2_gen_cntl |= RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */
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else
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fp2_gen_cntl |= RADEON_FP2_PAD_FLOP_EN | R300_FP2_DVO_CLOCK_MODE_SINGLE;
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fp2_gen_cntl &= ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format, */
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/*if (mode->clock > 165000)
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fp2_gen_cntl |= R300_FP2_DVO_DUAL_CHANNEL_EN;*/
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fp2_gen_cntl &= ~(RADEON_FP2_ON |
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RADEON_FP2_DVO_EN |
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RADEON_FP2_DVO_RATE_SEL_SDR);
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/* XXX: these are oem specific */
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if (radeon_is_r300(dev_priv)) {
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if ((dev->pdev->device == 0x4850) &&
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(dev->pdev->subsystem_vendor == 0x1028) &&
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(dev->pdev->subsystem_device == 0x2001)) /* Dell Inspiron 8600 */
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fp2_gen_cntl |= R300_FP2_DVO_CLOCK_MODE_SINGLE;
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else
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fp2_gen_cntl |= RADEON_FP2_PAD_FLOP_EN | R300_FP2_DVO_CLOCK_MODE_SINGLE;
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/*if (mode->clock > 165000)
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fp2_gen_cntl |= R300_FP2_DVO_DUAL_CHANNEL_EN;*/
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}
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}
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if (radeon_crtc->crtc_id == 0) {
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@ -277,6 +277,8 @@ struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev
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struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
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struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
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struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
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extern void atombios_ext_tmds_setup(struct drm_encoder *encoder,
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struct drm_display_mode *mode);
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extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
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extern void atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y);
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@ -287,6 +289,7 @@ extern void atombios_crtc_mode_set(struct drm_crtc *crtc,
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extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
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extern void radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y);
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extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
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extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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@ -456,6 +456,7 @@ typedef struct drm_radeon_kcmd_buffer {
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extern int radeon_no_wb;
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extern int radeon_dynclks;
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extern int radeon_r4xx_atom;
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extern struct drm_ioctl_desc radeon_ioctls[];
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extern int radeon_max_ioctl;
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