tests/amdgpu: add VCN3.0 regs support
VCN3.0 has its own set of internal regs Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Thong Thai <thong.thai@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com>main
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c7d8941288
commit
7b9d4bbdd5
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@ -56,6 +56,8 @@ static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static uint32_t family_id;
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static uint32_t chip_rev;
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static uint32_t chip_id;
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static uint32_t asic_id;
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static amdgpu_context_handle context_handle;
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@ -96,6 +98,8 @@ CU_BOOL suite_vcn_tests_enable(void)
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return CU_FALSE;
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family_id = device_handle->info.family_id;
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chip_rev = device_handle->info.chip_rev;
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chip_id = device_handle->info.chip_external_rev;
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asic_id = device_handle->info.asic_id;
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if (amdgpu_device_deinitialize(device_handle))
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@ -122,11 +126,20 @@ CU_BOOL suite_vcn_tests_enable(void)
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reg.cntl = 0x81c6;
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}
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} else if (family_id == AMDGPU_FAMILY_NV) {
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reg.data0 = 0x504;
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reg.data1 = 0x505;
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reg.cmd = 0x503;
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reg.nop = 0x53f;
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reg.cntl = 0x506;
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if (chip_id == (chip_rev + 0x28)) {
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reg.data0 = 0x10;
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reg.data1 = 0x11;
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reg.cmd = 0xf;
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reg.nop = 0x29;
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reg.cntl = 0x26d;
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}
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else {
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reg.data0 = 0x504;
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reg.data1 = 0x505;
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reg.cmd = 0x503;
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reg.nop = 0x53f;
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reg.cntl = 0x506;
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}
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} else
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return CU_FALSE;
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