amdgpu/: concisely && consistently check null ptrs in canonical form

Be consistent and use the canonical form while sanity checking
null pointers, also combine a few branches for brevity.

v2: rebase on top of 'add amdgpu_cs_wait_fences' series.

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
main
Edward O'Callaghan 2017-04-19 02:13:19 +10:00
parent 90c304584a
commit 7cfcd5ef4b
3 changed files with 17 additions and 33 deletions

View File

@ -652,7 +652,7 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
return -EINVAL;
list = malloc(number_of_resources * sizeof(struct drm_amdgpu_bo_list_entry));
if (list == NULL)
if (!list)
return -ENOMEM;
args.in.operation = AMDGPU_BO_LIST_OP_UPDATE;

View File

@ -59,13 +59,11 @@ int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
int i, j, k;
int r;
if (NULL == dev)
return -EINVAL;
if (NULL == context)
if (!dev || !context)
return -EINVAL;
gpu_context = calloc(1, sizeof(struct amdgpu_context));
if (NULL == gpu_context)
if (!gpu_context)
return -ENOMEM;
gpu_context->dev = dev;
@ -110,7 +108,7 @@ int amdgpu_cs_ctx_free(amdgpu_context_handle context)
int i, j, k;
int r;
if (NULL == context)
if (!context)
return -EINVAL;
pthread_mutex_destroy(&context->sequence_mutex);
@ -330,9 +328,7 @@ int amdgpu_cs_submit(amdgpu_context_handle context,
uint32_t i;
int r;
if (NULL == context)
return -EINVAL;
if (NULL == ibs_request)
if (!context || !ibs_request)
return -EINVAL;
r = 0;
@ -416,11 +412,7 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence,
bool busy = true;
int r;
if (NULL == fence)
return -EINVAL;
if (NULL == expired)
return -EINVAL;
if (NULL == fence->context)
if (!fence || !expired || !fence->context)
return -EINVAL;
if (fence->ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
@ -493,12 +485,9 @@ int amdgpu_cs_wait_fences(struct amdgpu_cs_fence *fences,
uint32_t i;
/* Sanity check */
if (NULL == fences)
return -EINVAL;
if (NULL == status)
return -EINVAL;
if (fence_count <= 0)
if (!fences || !status || !fence_count)
return -EINVAL;
for (i = 0; i < fence_count; i++) {
if (NULL == fences[i].context)
return -EINVAL;
@ -518,11 +507,11 @@ int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle *sem)
{
struct amdgpu_semaphore *gpu_semaphore;
if (NULL == sem)
if (!sem)
return -EINVAL;
gpu_semaphore = calloc(1, sizeof(struct amdgpu_semaphore));
if (NULL == gpu_semaphore)
if (!gpu_semaphore)
return -ENOMEM;
atomic_set(&gpu_semaphore->refcount, 1);
@ -537,14 +526,12 @@ int amdgpu_cs_signal_semaphore(amdgpu_context_handle ctx,
uint32_t ring,
amdgpu_semaphore_handle sem)
{
if (NULL == ctx)
if (!ctx || !sem)
return -EINVAL;
if (ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
if (NULL == sem)
return -EINVAL;
/* sem has been signaled */
if (sem->signal_fence.context)
return -EINVAL;
@ -565,14 +552,12 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
uint32_t ring,
amdgpu_semaphore_handle sem)
{
if (NULL == ctx)
if (!ctx || !sem)
return -EINVAL;
if (ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
if (NULL == sem)
return -EINVAL;
/* must signal first */
if (NULL == sem->signal_fence.context)
return -EINVAL;
@ -585,9 +570,7 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem)
{
if (NULL == sem)
return -EINVAL;
if (NULL == sem->signal_fence.context)
if (!sem || !sem->signal_fence.context)
return -EINVAL;
sem->signal_fence.context = NULL;;
@ -601,7 +584,7 @@ static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem)
static int amdgpu_cs_unreference_sem(amdgpu_semaphore_handle sem)
{
if (NULL == sem)
if (!sem)
return -EINVAL;
if (update_references(&sem->refcount, NULL))

View File

@ -234,8 +234,9 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
int amdgpu_query_gpu_info(amdgpu_device_handle dev,
struct amdgpu_gpu_info *info)
{
if ((dev == NULL) || (info == NULL))
if (!dev || !info)
return -EINVAL;
/* Get ASIC info*/
*info = dev->info;
@ -300,7 +301,7 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev,
struct drm_amdgpu_info_gds gds_config = {};
int r;
if (gds_info == NULL)
if (!gds_info)
return -EINVAL;
r = amdgpu_query_info(dev, AMDGPU_INFO_GDS_CONFIG,