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tests/amdgpu/vcn:update decoder unit test 

update decoder unit test with session context buffer for VCN v1 to v4

v2: remove multiple checks for vcn4 (Ruijing Dong)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
main
Saleemkhan Jamadar 2023-06-22 14:27:10 +05:30 committed by Leo Liu
parent 98e1db5011
commit 7d7a9901bd
1 changed files with 21 additions and 5 deletions
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26
tests/amdgpu/vcn_tests.c
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@ -177,6 +177,7 @@ static uint32_t *ib_checksum;
static uint32_t *ib_size_in_dw; static uint32_t *ib_size_in_dw;
static rvcn_decode_buffer_t *decode_buffer; static rvcn_decode_buffer_t *decode_buffer;
struct amdgpu_vcn_bo session_ctx_buf;
static amdgpu_bo_handle resources[MAX_RESOURCES]; static amdgpu_bo_handle resources[MAX_RESOURCES];
static unsigned num_resources; static unsigned num_resources;
@ -561,7 +562,9 @@ static void amdgpu_cs_vcn_dec_create(void)
num_resources = 0; num_resources = 0;
alloc_resource(&msg_buf, 4096, AMDGPU_GEM_DOMAIN_GTT); alloc_resource(&msg_buf, 4096, AMDGPU_GEM_DOMAIN_GTT);
alloc_resource(&session_ctx_buf, 32 * 4096, AMDGPU_GEM_DOMAIN_VRAM);
resources[num_resources++] = msg_buf.handle; resources[num_resources++] = msg_buf.handle;
resources[num_resources++] = session_ctx_buf.handle;
resources[num_resources++] = ib_handle; resources[num_resources++] = ib_handle;
r = amdgpu_bo_cpu_map(msg_buf.handle, (void **)&msg_buf.ptr); r = amdgpu_bo_cpu_map(msg_buf.handle, (void **)&msg_buf.ptr);
@ -571,9 +574,9 @@ static void amdgpu_cs_vcn_dec_create(void)
memcpy(msg_buf.ptr, vcn_dec_create_msg, sizeof(vcn_dec_create_msg)); memcpy(msg_buf.ptr, vcn_dec_create_msg, sizeof(vcn_dec_create_msg));
len = 0; len = 0;
if (vcn_dec_sw_ring == true) if (vcn_dec_sw_ring == true) {
vcn_dec_cmd(msg_buf.addr, 0, &len); vcn_dec_cmd(msg_buf.addr, 0, &len);
else { } else {
ib_cpu[len++] = reg[vcn_reg_index].data0; ib_cpu[len++] = reg[vcn_reg_index].data0;
ib_cpu[len++] = msg_buf.addr; ib_cpu[len++] = msg_buf.addr;
ib_cpu[len++] = reg[vcn_reg_index].data1; ib_cpu[len++] = reg[vcn_reg_index].data1;
@ -586,6 +589,7 @@ static void amdgpu_cs_vcn_dec_create(void)
} }
} }
vcn_dec_cmd(session_ctx_buf.addr, 5, &len);
if (vcn_unified_ring) { if (vcn_unified_ring) {
amdgpu_cs_sq_ib_tail(ib_cpu + len); amdgpu_cs_sq_ib_tail(ib_cpu + len);
ip = AMDGPU_HW_IP_VCN_ENC; ip = AMDGPU_HW_IP_VCN_ENC;
@ -601,8 +605,9 @@ static void amdgpu_cs_vcn_dec_create(void)
static void amdgpu_cs_vcn_dec_decode(void) static void amdgpu_cs_vcn_dec_decode(void)
{ {
const unsigned dpb_size = 15923584, dt_size = 737280; const unsigned dpb_size = 15923584, dt_size = 737280, session_ctxbuf_size = 131072;
uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, ctx_addr, dt_addr, it_addr, sum; uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, ctx_addr, dt_addr, it_addr, sum;
uint64_t session_ctxbuf_addr = 0;
struct amdgpu_vcn_bo dec_buf; struct amdgpu_vcn_bo dec_buf;
int size, len, i, r; int size, len, i, r;
unsigned ip; unsigned ip;
@ -614,6 +619,8 @@ static void amdgpu_cs_vcn_dec_decode(void)
size += ALIGN(sizeof(uvd_bitstream), 4*1024); size += ALIGN(sizeof(uvd_bitstream), 4*1024);
size += ALIGN(dpb_size, 4*1024); size += ALIGN(dpb_size, 4*1024);
size += ALIGN(dt_size, 4*1024); size += ALIGN(dt_size, 4*1024);
if (vcn_ip_version_major < 4)
size += ALIGN(session_ctxbuf_size, 4*1024);
num_resources = 0; num_resources = 0;
alloc_resource(&dec_buf, size, AMDGPU_GEM_DOMAIN_GTT); alloc_resource(&dec_buf, size, AMDGPU_GEM_DOMAIN_GTT);
@ -648,8 +655,13 @@ static void amdgpu_cs_vcn_dec_decode(void)
dpb_addr = ALIGN(bs_addr + sizeof(uvd_bitstream), 4*1024); dpb_addr = ALIGN(bs_addr + sizeof(uvd_bitstream), 4*1024);
ctx_addr = ALIGN(dpb_addr + 0x006B9400, 4*1024); ctx_addr = ALIGN(dpb_addr + 0x006B9400, 4*1024);
dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024);
if (vcn_ip_version_major < 4)
session_ctxbuf_addr = ALIGN(dt_addr + dt_size, 4*1024);
len = 0; len = 0;
if (vcn_ip_version_major >= 4)
vcn_dec_cmd(session_ctx_buf.addr, 0x5, &len);
vcn_dec_cmd(msg_addr, 0x0, &len); vcn_dec_cmd(msg_addr, 0x0, &len);
vcn_dec_cmd(dpb_addr, 0x1, &len); vcn_dec_cmd(dpb_addr, 0x1, &len);
vcn_dec_cmd(dt_addr, 0x2, &len); vcn_dec_cmd(dt_addr, 0x2, &len);
@ -657,6 +669,8 @@ static void amdgpu_cs_vcn_dec_decode(void)
vcn_dec_cmd(bs_addr, 0x100, &len); vcn_dec_cmd(bs_addr, 0x100, &len);
vcn_dec_cmd(it_addr, 0x204, &len); vcn_dec_cmd(it_addr, 0x204, &len);
vcn_dec_cmd(ctx_addr, 0x206, &len); vcn_dec_cmd(ctx_addr, 0x206, &len);
if(vcn_ip_version_major < 4)
vcn_dec_cmd(session_ctxbuf_addr, 0x5, &len);
if (vcn_dec_sw_ring == false) { if (vcn_dec_sw_ring == false) {
ib_cpu[len++] = reg[vcn_reg_index].cntl; ib_cpu[len++] = reg[vcn_reg_index].cntl;
@ -702,9 +716,9 @@ static void amdgpu_cs_vcn_dec_destroy(void)
memcpy(msg_buf.ptr, vcn_dec_destroy_msg, sizeof(vcn_dec_destroy_msg)); memcpy(msg_buf.ptr, vcn_dec_destroy_msg, sizeof(vcn_dec_destroy_msg));
len = 0; len = 0;
if (vcn_dec_sw_ring == true) if (vcn_dec_sw_ring == true) {
vcn_dec_cmd(msg_buf.addr, 0, &len); vcn_dec_cmd(msg_buf.addr, 0, &len);
else { } else {
ib_cpu[len++] = reg[vcn_reg_index].data0; ib_cpu[len++] = reg[vcn_reg_index].data0;
ib_cpu[len++] = msg_buf.addr; ib_cpu[len++] = msg_buf.addr;
ib_cpu[len++] = reg[vcn_reg_index].data1; ib_cpu[len++] = reg[vcn_reg_index].data1;
@ -717,6 +731,7 @@ static void amdgpu_cs_vcn_dec_destroy(void)
} }
} }
vcn_dec_cmd(session_ctx_buf.addr, 5, &len);
if (vcn_unified_ring) { if (vcn_unified_ring) {
amdgpu_cs_sq_ib_tail(ib_cpu + len); amdgpu_cs_sq_ib_tail(ib_cpu + len);
ip = AMDGPU_HW_IP_VCN_ENC; ip = AMDGPU_HW_IP_VCN_ENC;
@ -727,6 +742,7 @@ static void amdgpu_cs_vcn_dec_destroy(void)
CU_ASSERT_EQUAL(r, 0); CU_ASSERT_EQUAL(r, 0);
free_resource(&msg_buf); free_resource(&msg_buf);
free_resource(&session_ctx_buf);
} }
static void amdgpu_cs_vcn_enc_create(void) static void amdgpu_cs_vcn_enc_create(void)