Still more work on the context switching code.
parent
a749d9d5b4
commit
7ef44b2b8d
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@ -112,8 +112,6 @@ typedef struct drm_nouveau_private {
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drm_local_map_t *mmio;
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drm_local_map_t *fb;
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int64_t fb_usable_size;
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int cur_fifo;
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struct nouveau_object *fb_obj;
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@ -227,7 +227,7 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
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/* disable the fifo caches */
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NV_WRITE(NV_PFIFO_CACHES, 0x00000000);
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if (dev_priv->card_type <= NV_04)
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if (dev_priv->card_type <= NV_05)
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ctx_size=32;
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else
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ctx_size=128;
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@ -239,7 +239,7 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
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NV_WRITE(ctx_addr,init->put_base);
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NV_WRITE(ctx_addr+4,init->put_base);
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if (dev_priv->card_type <= NV_04)
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if (dev_priv->card_type <= NV_05)
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{
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// that's what is done in nvosdk, but that part of the code is buggy so...
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NV_WRITE(ctx_addr+8,dev_priv->cmdbuf_obj->instance >> 4);
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@ -69,7 +69,15 @@ void nouveau_irq_postinstall(drm_device_t *dev)
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DRM_DEBUG("IRQ: postinst\n");
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/* Enable PFIFO error reporting */
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NV_WRITE(NV_PFIFO_INTEN , NV_PFIFO_INTR_ERROR);
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NV_WRITE(NV_PFIFO_INTEN ,
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NV_PFIFO_INTR_CACHE_ERROR |
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NV_PFIFO_INTR_RUNOUT |
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NV_PFIFO_INTR_RUNOUT_OVERFLOW |
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NV_PFIFO_INTR_DMA_PUSHER |
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NV_PFIFO_INTR_DMA_PT |
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NV_PFIFO_INTR_SEMAPHORE |
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NV_PFIFO_INTR_ACQUIRE_TIMEOUT
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);
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NV_WRITE(NV_PFIFO_INTSTAT, 0xFFFFFFFF);
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/* Enable PGRAPH interrupts */
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@ -279,6 +287,7 @@ static void nouveau_pgraph_irq_handler(drm_device_t *dev)
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switch(dev_priv->card_type)
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{
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case NV_04:
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case NV_05:
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nouveau_nv04_context_switch(dev);
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break;
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case NV_10:
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@ -75,7 +75,13 @@
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#define NV_PFIFO_DMA_TIMESLICE 0x00002044
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#define NV_PFIFO_INTSTAT 0x00002100
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#define NV_PFIFO_INTEN 0x00002140
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# define NV_PFIFO_INTR_ERROR (1<<0)
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# define NV_PFIFO_INTR_CACHE_ERROR (1<< 0)
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# define NV_PFIFO_INTR_RUNOUT (1<< 4)
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# define NV_PFIFO_INTR_RUNOUT_OVERFLOW (1<< 8)
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# define NV_PFIFO_INTR_DMA_PUSHER (1<<12)
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# define NV_PFIFO_INTR_DMA_PT (1<<16)
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# define NV_PFIFO_INTR_SEMAPHORE (1<<20)
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# define NV_PFIFO_INTR_ACQUIRE_TIMEOUT (1<<24)
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#define NV_PFIFO_RAMHT 0x00002210
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#define NV_PFIFO_RAMFC 0x00002214
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#define NV_PFIFO_RAMRO 0x00002218
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@ -91,7 +97,6 @@
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#define NV_PFIFO_CACH1_DMAPSH 0x00003220
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#define NV_PFIFO_CACH1_DMAF 0x00003224
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# define NV_PFIFO_CACH1_DMAF_TRIG_8_BYTES 0x00000000
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# define NV_PFIFO_CACH1_DMAF_TRIG_8_BYTES 0x00000000
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# define NV_PFIFO_CACH1_DMAF_TRIG_16_BYTES 0x00000008
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# define NV_PFIFO_CACH1_DMAF_TRIG_24_BYTES 0x00000010
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# define NV_PFIFO_CACH1_DMAF_TRIG_32_BYTES 0x00000018
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@ -64,11 +64,6 @@ int nouveau_firstopen(struct drm_device *dev)
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DRM_INFO("%lld MB of video ram detected\n",nouveau_mem_fb_amount(dev)>>20);
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if (dev_priv->card_type>=NV_40)
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dev_priv->fb_usable_size=nouveau_mem_fb_amount(dev)-560*1024;
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else
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dev_priv->fb_usable_size=nouveau_mem_fb_amount(dev)-256*1024;
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return 0;
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}
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