Corresponding sync with PCI GART updates.
Gareth Hughes
parent
5f67507e65
commit
82b645dc74
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@ -37,7 +37,7 @@
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#define R128_NAME "r128"
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#define R128_DESC "ATI Rage 128"
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#define R128_DATE "20010125"
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#define R128_DATE "20010130"
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#define R128_MAJOR 2
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#define R128_MINOR 1
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#define R128_PATCHLEVEL 4
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@ -563,12 +563,6 @@ int r128_ioctl(struct inode *inode, struct file *filp,
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}
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}
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#if 0
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if ( retcode ) {
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DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
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}
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#endif
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atomic_dec(&dev->ioctl_count);
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return retcode;
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}
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@ -74,7 +74,7 @@ int r128_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
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total = PAGE_SIZE << page_order;
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byte_count = 0;
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agp_offset = dev->agp->base + request.agp_start;
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agp_offset = request.agp_start;
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DRM_DEBUG("count: %d\n", count);
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DRM_DEBUG("order: %d\n", order);
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@ -125,7 +125,8 @@ int r128_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
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buf->order = order;
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buf->used = 0;
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buf->offset = (dma->byte_count + offset);
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buf->address = (void *)(agp_offset + offset);
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buf->bus_address = agp_offset + offset;
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buf->address = (void *)(agp_offset + offset + dev->agp->base);
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buf->next = NULL;
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buf->waiting = 0;
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buf->pending = 0;
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@ -37,7 +37,7 @@
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#define R128_NAME "r128"
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#define R128_DESC "ATI Rage 128"
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#define R128_DATE "20010125"
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#define R128_DATE "20010130"
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#define R128_MAJOR 2
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#define R128_MINOR 1
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#define R128_PATCHLEVEL 4
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@ -563,12 +563,6 @@ int r128_ioctl(struct inode *inode, struct file *filp,
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}
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}
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#if 0
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if ( retcode ) {
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DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
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}
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#endif
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atomic_dec(&dev->ioctl_count);
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return retcode;
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}
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@ -289,6 +289,8 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
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#define R128_TEX_CNTL_C 0x1c9c
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# define R128_TEX_CACHE_FLUSH (1 << 23)
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#define R128_WAIT_UNTIL 0x1720
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# define R128_EVENT_CRTC_OFFSET (1 << 0)
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#define R128_WINDOW_XY_OFFSET 0x1bcc
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@ -398,6 +400,8 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
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#define R128_RING_HIGH_MARK 128
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#define R128_PERFORMANCE_BOXES 0
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#define R128_BASE(reg) ((u32)(dev_priv->mmio->handle))
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#define R128_ADDR(reg) (R128_BASE(reg) + reg)
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@ -410,6 +414,7 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
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#define R128_READ8(reg) R128_DEREF8(reg)
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#define R128_WRITE8(reg,val) do { R128_DEREF8(reg) = val; } while (0)
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#define R128_WRITE_PLL(addr,val) \
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do { \
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R128_WRITE8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \
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@ -428,8 +433,6 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
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(pkt) | ((n) << 16))
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/* ================================================================
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* Misc helper macros
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*/
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@ -473,6 +476,12 @@ do { \
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} \
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} while (0)
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#define R128_WAIT_UNTIL_PAGE_FLIPPED() \
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do { \
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OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \
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OUT_RING( R128_EVENT_CRTC_OFFSET ); \
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} while (0)
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/* ================================================================
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* Ring control
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@ -518,6 +527,4 @@ do { \
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write &= tail_mask; \
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} while (0)
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#define R128_PERFORMANCE_BOXES 0
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#endif /* __R128_DRV_H__ */
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@ -543,8 +543,9 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
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r128_cce_performance_boxes( dev_priv );
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#endif
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BEGIN_RING( 2 );
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BEGIN_RING( 4 );
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R128_WAIT_UNTIL_PAGE_FLIPPED();
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OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) );
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if ( dev_priv->current_page == 0 ) {
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@ -578,7 +579,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
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drm_r128_buf_priv_t *buf_priv = buf->dev_private;
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drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
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int format = sarea_priv->vc_format;
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int offset = dev_priv->buffers->offset + buf->offset - dev->agp->base;
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int offset = buf->bus_address;
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int size = buf->used;
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int prim = buf_priv->prim;
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int i = 0;
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@ -645,9 +646,6 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
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sarea_priv->nbox = 0;
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}
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static void r128_cce_dispatch_indirect( drm_device_t *dev,
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drm_buf_t *buf,
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int start, int end )
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@ -661,8 +659,7 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
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r128_update_ring_snapshot( dev_priv );
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if ( start != end ) {
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int offset = (dev_priv->buffers->offset - dev->agp->base
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+ buf->offset + start);
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int offset = buf->bus_address + start;
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int dwords = (end - start + 3) / sizeof(u32);
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/* Indirect buffer data must be an even number of
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