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Corresponding sync with PCI GART updates.

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Gareth Hughes 2001-01-29 17:46:23 +00:00
parent 5f67507e65
commit 82b645dc74
5 changed files with 20 additions and 27 deletions
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8
linux-core/r128_drv.c
View File

@ -37,7 +37,7 @@
#define R128_NAME "r128" #define R128_NAME "r128"
#define R128_DESC "ATI Rage 128" #define R128_DESC "ATI Rage 128"
#define R128_DATE "20010125" #define R128_DATE "20010130"
#define R128_MAJOR 2 #define R128_MAJOR 2
#define R128_MINOR 1 #define R128_MINOR 1
#define R128_PATCHLEVEL 4 #define R128_PATCHLEVEL 4
@ -563,12 +563,6 @@ int r128_ioctl(struct inode *inode, struct file *filp,
} }
} }
#if 0
if ( retcode ) {
DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
}
#endif
atomic_dec(&dev->ioctl_count); atomic_dec(&dev->ioctl_count);
return retcode; return retcode;
} }

5
linux/r128_bufs.c
View File

@ -74,7 +74,7 @@ int r128_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
total = PAGE_SIZE << page_order; total = PAGE_SIZE << page_order;
byte_count = 0; byte_count = 0;
agp_offset = dev->agp->base + request.agp_start; agp_offset = request.agp_start;
DRM_DEBUG("count: %d\n", count); DRM_DEBUG("count: %d\n", count);
DRM_DEBUG("order: %d\n", order); DRM_DEBUG("order: %d\n", order);
@ -125,7 +125,8 @@ int r128_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
buf->order = order; buf->order = order;
buf->used = 0; buf->used = 0;
buf->offset = (dma->byte_count + offset); buf->offset = (dma->byte_count + offset);
buf->address = (void *)(agp_offset + offset); buf->bus_address = agp_offset + offset;
buf->address = (void *)(agp_offset + offset + dev->agp->base);
buf->next = NULL; buf->next = NULL;
buf->waiting = 0; buf->waiting = 0;
buf->pending = 0; buf->pending = 0;

8
linux/r128_drv.c
View File

@ -37,7 +37,7 @@
#define R128_NAME "r128" #define R128_NAME "r128"
#define R128_DESC "ATI Rage 128" #define R128_DESC "ATI Rage 128"
#define R128_DATE "20010125" #define R128_DATE "20010130"
#define R128_MAJOR 2 #define R128_MAJOR 2
#define R128_MINOR 1 #define R128_MINOR 1
#define R128_PATCHLEVEL 4 #define R128_PATCHLEVEL 4
@ -563,12 +563,6 @@ int r128_ioctl(struct inode *inode, struct file *filp,
} }
} }
#if 0
if ( retcode ) {
DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
}
#endif
atomic_dec(&dev->ioctl_count); atomic_dec(&dev->ioctl_count);
return retcode; return retcode;
} }

15
linux/r128_drv.h
View File

@ -289,6 +289,8 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
#define R128_TEX_CNTL_C 0x1c9c #define R128_TEX_CNTL_C 0x1c9c
# define R128_TEX_CACHE_FLUSH (1 << 23) # define R128_TEX_CACHE_FLUSH (1 << 23)
#define R128_WAIT_UNTIL 0x1720
# define R128_EVENT_CRTC_OFFSET (1 << 0)
#define R128_WINDOW_XY_OFFSET 0x1bcc #define R128_WINDOW_XY_OFFSET 0x1bcc
@ -398,6 +400,8 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
#define R128_RING_HIGH_MARK 128 #define R128_RING_HIGH_MARK 128
#define R128_PERFORMANCE_BOXES 0
#define R128_BASE(reg) ((u32)(dev_priv->mmio->handle)) #define R128_BASE(reg) ((u32)(dev_priv->mmio->handle))
#define R128_ADDR(reg) (R128_BASE(reg) + reg) #define R128_ADDR(reg) (R128_BASE(reg) + reg)
@ -410,6 +414,7 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
#define R128_READ8(reg) R128_DEREF8(reg) #define R128_READ8(reg) R128_DEREF8(reg)
#define R128_WRITE8(reg,val) do { R128_DEREF8(reg) = val; } while (0) #define R128_WRITE8(reg,val) do { R128_DEREF8(reg) = val; } while (0)
#define R128_WRITE_PLL(addr,val) \ #define R128_WRITE_PLL(addr,val) \
do { \ do { \
R128_WRITE8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \ R128_WRITE8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \
@ -428,8 +433,6 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
(pkt) | ((n) << 16)) (pkt) | ((n) << 16))
/* ================================================================ /* ================================================================
* Misc helper macros * Misc helper macros
*/ */
@ -473,6 +476,12 @@ do { \
} \ } \
} while (0) } while (0)
#define R128_WAIT_UNTIL_PAGE_FLIPPED() \
do { \
OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \
OUT_RING( R128_EVENT_CRTC_OFFSET ); \
} while (0)
/* ================================================================ /* ================================================================
* Ring control * Ring control
@ -518,6 +527,4 @@ do { \
write &= tail_mask; \ write &= tail_mask; \
} while (0) } while (0)
#define R128_PERFORMANCE_BOXES 0
#endif /* __R128_DRV_H__ */ #endif /* __R128_DRV_H__ */

11
linux/r128_state.c
View File

@ -543,8 +543,9 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
r128_cce_performance_boxes( dev_priv ); r128_cce_performance_boxes( dev_priv );
#endif #endif
BEGIN_RING( 2 ); BEGIN_RING( 4 );
R128_WAIT_UNTIL_PAGE_FLIPPED();
OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) ); OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) );
if ( dev_priv->current_page == 0 ) { if ( dev_priv->current_page == 0 ) {
@ -578,7 +579,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
drm_r128_buf_priv_t *buf_priv = buf->dev_private; drm_r128_buf_priv_t *buf_priv = buf->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
int format = sarea_priv->vc_format; int format = sarea_priv->vc_format;
int offset = dev_priv->buffers->offset + buf->offset - dev->agp->base; int offset = buf->bus_address;
int size = buf->used; int size = buf->used;
int prim = buf_priv->prim; int prim = buf_priv->prim;
int i = 0; int i = 0;
@ -645,9 +646,6 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
sarea_priv->nbox = 0; sarea_priv->nbox = 0;
} }
static void r128_cce_dispatch_indirect( drm_device_t *dev, static void r128_cce_dispatch_indirect( drm_device_t *dev,
drm_buf_t *buf, drm_buf_t *buf,
int start, int end ) int start, int end )
@ -661,8 +659,7 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
r128_update_ring_snapshot( dev_priv ); r128_update_ring_snapshot( dev_priv );
if ( start != end ) { if ( start != end ) {
int offset = (dev_priv->buffers->offset - dev->agp->base int offset = buf->bus_address + start;
+ buf->offset + start);
int dwords = (end - start + 3) / sizeof(u32); int dwords = (end - start + 3) / sizeof(u32);
/* Indirect buffer data must be an even number of /* Indirect buffer data must be an even number of