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Fix command list submission on big-endian.

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Ian Romanick 2007-10-10 15:25:30 -07:00
parent bf126f4925
commit 83da774b19
3 changed files with 7 additions and 28 deletions
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30
linux-core/xgi_cmdlist.c
View File

@ -45,7 +45,7 @@ static inline void dwWriteReg(struct drm_map * map, u32 addr, u32 data)
DRM_INFO("mmio_map->handle = 0x%p, addr = 0x%x, data = 0x%x\n", DRM_INFO("mmio_map->handle = 0x%p, addr = 0x%x, data = 0x%x\n",
map->handle, addr, data); map->handle, addr, data);
#endif #endif
DRM_WRITE32(map, addr, cpu_to_le32(data)); DRM_WRITE32(map, addr, data);
} }
@ -98,25 +98,6 @@ int xgi_submit_cmdlist(struct drm_device * dev, void * data,
const struct xgi_cmd_info *const pCmdInfo = const struct xgi_cmd_info *const pCmdInfo =
(struct xgi_cmd_info *) data; (struct xgi_cmd_info *) data;
const unsigned int cmd = get_batch_command(pCmdInfo->type); const unsigned int cmd = get_batch_command(pCmdInfo->type);
#ifdef __BIG_ENDIAN
const u32 *const ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr);
unsigned i;
unsigned j;
xgi_waitfor_pci_idle(info);
for (j = 4; j < pCmdInfo->size; j += 4) {
u32 reg = ptr[j];
for (i = 1; i < 4; i++) {
if ((reg & 1) != 0) {
const unsigned r = 0x2100 | (reg & 0x0fe);
DRM_WRITE32(info->mmio_map, r, ptr[j + i]);
}
reg >>= 8;
}
}
#else
u32 begin[4]; u32 begin[4];
@ -167,7 +148,6 @@ int xgi_submit_cmdlist(struct drm_device * dev, void * data,
} }
info->cmdring.last_ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr); info->cmdring.last_ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr);
#endif
drm_fence_flush_old(info->dev, 0, info->next_sequence); drm_fence_flush_old(info->dev, 0, info->next_sequence);
return 0; return 0;
} }
@ -323,13 +303,13 @@ void xgi_emit_flush(struct xgi_info * info, bool stop)
*/ */
void xgi_emit_nop(struct xgi_info * info) void xgi_emit_nop(struct xgi_info * info)
{ {
info->cmdring.last_ptr[1] = BEGIN_LINK_ENABLE_MASK info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK
| (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence); | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence));
info->cmdring.last_ptr[2] = 0; info->cmdring.last_ptr[2] = 0;
info->cmdring.last_ptr[3] = 0; info->cmdring.last_ptr[3] = 0;
DRM_WRITEMEMORYBARRIER(); DRM_WRITEMEMORYBARRIER();
info->cmdring.last_ptr[0] = (get_batch_command(BTYPE_CTRL) << 24) info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
| (BEGIN_VALID_MASK); | (BEGIN_VALID_MASK));
triggerHWCommandList(info); triggerHWCommandList(info);

2
linux-core/xgi_misc.c
View File

@ -326,7 +326,7 @@ void xgi_waitfor_pci_idle(struct xgi_info * info)
unsigned int same_count = 0; unsigned int same_count = 0;
while (idleCount < 5) { while (idleCount < 5) {
const u32 status = le32_to_cpu(DRM_READ32(info->mmio_map, WHOLD_GE_STATUS)) const u32 status = DRM_READ32(info->mmio_map, WHOLD_GE_STATUS)
& IDLE_MASK; & IDLE_MASK;
if (status == old_status) { if (status == old_status) {

3
linux-core/xgi_pcie.c
View File

@ -40,8 +40,7 @@ void xgi_gart_flush(struct drm_device *dev)
DRM_WRITE8(info->mmio_map, 0xB00C, temp & ~0x02); DRM_WRITE8(info->mmio_map, 0xB00C, temp & ~0x02);
/* Set GART base address to HW */ /* Set GART base address to HW */
DRM_WRITE32(info->mmio_map, 0xB034, DRM_WRITE32(info->mmio_map, 0xB034, info->gart_info.bus_addr);
cpu_to_le32(info->gart_info.bus_addr));
/* Flush GART table. */ /* Flush GART table. */
DRM_WRITE8(info->mmio_map, 0xB03F, 0x40); DRM_WRITE8(info->mmio_map, 0xB03F, 0x40);