libdrm: Add framebuffer modifiers uapi
Sync up with new kernel features as per commits: e3eb3250d84ef97b766312345774367b6a310db8 93b81f5102a7cd270a305c2741b17c8d44bb0629 b5ff6e1637b683d5996ae11ac29afe406c0bee90 8c4f83fb1e8bf317e894f62d17a63c32b7a6b75e 570655b09b065d2fff1b8ab9bdb8308f4c5a05a3 Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: Rob Clark <robdclark@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robclark@freedesktop.org>main
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@ -816,6 +816,7 @@ struct drm_event_vblank {
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#define DRM_CAP_PRIME 0x5
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#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
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#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
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#define DRM_CAP_ADDFB2_MODIFIERS 0x10
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#define DRM_PRIME_CAP_IMPORT 0x1
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#define DRM_PRIME_CAP_EXPORT 0x2
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@ -127,4 +127,97 @@
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#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
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#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
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/*
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* Format Modifiers:
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*
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* Format modifiers describe, typically, a re-ordering or modification
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* of the data in a plane of an FB. This can be used to express tiled/
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* swizzled formats, or compression, or a combination of the two.
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*
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* The upper 8 bits of the format modifier are a vendor-id as assigned
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* below. The lower 56 bits are assigned as vendor sees fit.
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*/
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/* Vendor Ids: */
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#define DRM_FORMAT_MOD_NONE 0
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#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
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#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
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#define DRM_FORMAT_MOD_VENDOR_NV 0x03
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#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
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#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
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/* add more to the end as needed */
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#define fourcc_mod_code(vendor, val) \
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((((u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
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/*
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* Format Modifier tokens:
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*
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* When adding a new token please document the layout with a code comment,
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* similar to the fourcc codes above. drm_fourcc.h is considered the
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* authoritative source for all of these.
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*/
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/* Intel framebuffer modifiers */
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/*
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* Intel X-tiling layout
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*
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* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
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* in row-major layout. Within the tile bytes are laid out row-major, with
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* a platform-dependent stride. On top of that the memory can apply
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* platform-depending swizzling of some higher address bits into bit6.
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*
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* This format is highly platforms specific and not useful for cross-driver
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* sharing. It exists since on a given platform it does uniquely identify the
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* layout in a simple way for i915-specific userspace.
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*/
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#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
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/*
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* Intel Y-tiling layout
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*
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* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
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* in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
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* chunks column-major, with a platform-dependent height. On top of that the
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* memory can apply platform-depending swizzling of some higher address bits
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* into bit6.
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*
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* This format is highly platforms specific and not useful for cross-driver
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* sharing. It exists since on a given platform it does uniquely identify the
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* layout in a simple way for i915-specific userspace.
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*/
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#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
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/*
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* Intel Yf-tiling layout
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*
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* This is a tiled layout using 4Kb tiles in row-major layout.
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* Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
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* are arranged in four groups (two wide, two high) with column-major layout.
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* Each group therefore consits out of four 256 byte units, which are also laid
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* out as 2x2 column-major.
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* 256 byte units are made out of four 64 byte blocks of pixels, producing
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* either a square block or a 2:1 unit.
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* 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
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* in pixel depends on the pixel depth.
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*/
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#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
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/*
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* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
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*
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* Macroblocks are laid in a Z-shape, and each pixel data is following the
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* standard NV12 style.
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* As for NV12, an image is the result of two frame buffers: one for Y,
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* one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
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* Alignment requirements are (for each buffer):
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* - multiple of 128 pixels for the width
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* - multiple of 32 pixels for the height
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*
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* For more information: see http://linuxtv.org/downloads/v4l-dvb-apis/re32.html
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*/
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#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
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#endif /* DRM_FOURCC_H */
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@ -322,7 +322,8 @@ struct drm_mode_fb_cmd {
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__u32 handle;
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};
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#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
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#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
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#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
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struct drm_mode_fb_cmd2 {
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__u32 fb_id;
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@ -343,10 +344,18 @@ struct drm_mode_fb_cmd2 {
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* So it would consist of Y as offset[0] and UV as
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* offset[1]. Note that offset[0] will generally
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* be 0.
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*
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* To accommodate tiled, compressed, etc formats, a per-plane
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* modifier can be specified. The default value of zero
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* indicates "native" format as specified by the fourcc.
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* Vendor specific modifier token. This allows, for example,
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* different tiling/swizzling pattern on different planes.
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* See discussion above of DRM_FORMAT_MOD_xxx.
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*/
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__u32 handles[4];
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__u32 pitches[4]; /* pitch for each plane */
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__u32 offsets[4]; /* offset of each plane */
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__u64 modifier[4]; /* ie, tiling, compressed (per plane) */
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};
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#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
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