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headers: Sync up some comment spelling and whitespace fixes from drm-next. 

This pulls in pieces of drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
main
Eric Anholt 2017-11-08 11:09:54 -08:00
parent 8d34bba212
commit 8affa26995
3 changed files with 7 additions and 7 deletions
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2
include/drm/mga_drm.h
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@ -111,7 +111,7 @@ extern "C" {
*/ */
#define MGA_NR_SAREA_CLIPRECTS 8 #define MGA_NR_SAREA_CLIPRECTS 8
/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 /* 2 heaps (1 for card, 1 for agp), each divided into up to 128
* regions, subject to a minimum region size of (1<<16) == 64k. * regions, subject to a minimum region size of (1<<16) == 64k.
* *
* Clients may subdivide regions internally, but when sharing between * Clients may subdivide regions internally, but when sharing between

2
include/drm/qxl_drm.h
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@ -34,7 +34,7 @@ extern "C" {
/* Please note that modifications to all structs defined here are /* Please note that modifications to all structs defined here are
* subject to backwards-compatibility constraints. * subject to backwards-compatibility constraints.
* *
* Do not use pointers, use uint64_t instead for 32 bit / 64 bit user/kernel * Do not use pointers, use __u64 instead for 32 bit / 64 bit user/kernel
* compatibility Keep fields aligned to their size * compatibility Keep fields aligned to their size
*/ */

10
include/drm/savage_drm.h
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@ -35,7 +35,7 @@ extern "C" {
#ifndef __SAVAGE_SAREA_DEFINES__ #ifndef __SAVAGE_SAREA_DEFINES__
#define __SAVAGE_SAREA_DEFINES__ #define __SAVAGE_SAREA_DEFINES__
/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 /* 2 heaps (1 for card, 1 for agp), each divided into up to 128
* regions, subject to a minimum region size of (1<<16) == 64k. * regions, subject to a minimum region size of (1<<16) == 64k.
* *
* Clients may subdivide regions internally, but when sharing between * Clients may subdivide regions internally, but when sharing between
@ -69,10 +69,10 @@ typedef struct _drm_savage_sarea {
#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02 #define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03 #define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
#define DRM_IOCTL_SAVAGE_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t) #define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
#define DRM_IOCTL_SAVAGE_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t) #define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
#define DRM_IOCTL_SAVAGE_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t) #define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
#define DRM_IOCTL_SAVAGE_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t) #define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
#define SAVAGE_DMA_PCI 1 #define SAVAGE_DMA_PCI 1
#define SAVAGE_DMA_AGP 3 #define SAVAGE_DMA_AGP 3