nouveau: ouch, add nouveau_dma.[ch] files..
Ben Skeggs
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92084c6e05
commit
8d5a8ebc31
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../shared-core/nouveau_dma.c
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../shared-core/nouveau_dma.h
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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#include "nouveau_dma.h"
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#define SKIPS 8
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int
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nouveau_dma_channel_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_drm_channel *dchan = &dev_priv->channel;
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struct nouveau_gpuobj *gpuobj = NULL;
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int grclass, ret, i;
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DRM_DEBUG("\n");
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/* Allocate channel */
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ret = nouveau_fifo_alloc(dev, &dchan->chan, (struct drm_file *)-2,
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NvDmaFB, NvDmaTT);
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if (ret) {
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DRM_ERROR("Error allocating GPU channel: %d\n", ret);
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return ret;
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}
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DRM_DEBUG("Using FIFO channel %d\n", dchan->chan->id);
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/* Map push buffer */
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drm_core_ioremap(dchan->chan->pushbuf_mem->map, dev);
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if (!dchan->chan->pushbuf_mem->map->handle) {
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DRM_ERROR("Failed to ioremap push buffer\n");
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return -EINVAL;
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}
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dchan->pushbuf = (void*)dchan->chan->pushbuf_mem->map->handle;
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/* Initialise DMA vars */
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dchan->max = (dchan->chan->pushbuf_mem->size >> 2) - 2;
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dchan->put = dchan->chan->pushbuf_base >> 2;
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dchan->cur = dchan->put;
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dchan->free = dchan->max - dchan->cur;
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/* Insert NOPS for SKIPS */
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dchan->free -= SKIPS;
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dchan->push_free = SKIPS;
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for (i=0; i<SKIPS; i++)
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OUT_RING(0);
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/* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier */
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if ((ret = nouveau_notifier_alloc(dchan->chan, NvNotify0, 1,
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&dchan->notify0_offset))) {
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DRM_ERROR("Error allocating NvNotify0: %d\n", ret);
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return ret;
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}
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/* We use NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
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if (dev_priv->card_type < NV_50) grclass = NV_MEMORY_TO_MEMORY_FORMAT;
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else grclass = NV50_MEMORY_TO_MEMORY_FORMAT;
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if ((ret = nouveau_gpuobj_gr_new(dchan->chan, grclass, &gpuobj))) {
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DRM_ERROR("Error creating NvM2MF: %d\n", ret);
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return ret;
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}
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if ((ret = nouveau_gpuobj_ref_add(dev, dchan->chan, NvM2MF,
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gpuobj, NULL))) {
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DRM_ERROR("Error referencing NvM2MF: %d\n", ret);
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return ret;
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}
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dchan->m2mf_dma_source = NvDmaFB;
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dchan->m2mf_dma_destin = NvDmaFB;
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);
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OUT_RING (NvM2MF);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY, 1);
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OUT_RING (NvNotify0);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE, 2);
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OUT_RING (dchan->m2mf_dma_source);
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OUT_RING (dchan->m2mf_dma_destin);
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FIRE_RING();
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return 0;
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}
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void
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nouveau_dma_channel_takedown(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_drm_channel *dchan = &dev_priv->channel;
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DRM_DEBUG("\n");
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if (dchan->chan) {
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nouveau_fifo_free(dchan->chan);
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dchan->chan = NULL;
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}
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}
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#define RING_SKIPS 8
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#define READ_GET() ((NV_READ(NV03_FIFO_REGS_DMAGET(dchan->chan->id)) - \
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dchan->chan->pushbuf_base) >> 2)
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#define WRITE_PUT(val) do { \
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NV_WRITE(NV03_FIFO_REGS_DMAPUT(dchan->chan->id), \
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((val) << 2) + dchan->chan->pushbuf_base); \
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} while(0)
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int
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nouveau_dma_wait(struct drm_device *dev, int size)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_drm_channel *dchan = &dev_priv->channel;
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uint32_t get;
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while (dchan->free < size) {
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get = READ_GET();
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if (dchan->put >= get) {
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dchan->free = dchan->max - dchan->cur;
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if (dchan->free < size) {
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dchan->push_free = 1;
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OUT_RING(0x20000000|dchan->chan->pushbuf_base);
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if (get <= RING_SKIPS) {
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/*corner case - will be idle*/
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if (dchan->put <= RING_SKIPS)
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WRITE_PUT(RING_SKIPS + 1);
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do {
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get = READ_GET();
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} while (get <= RING_SKIPS);
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}
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WRITE_PUT(RING_SKIPS);
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dchan->cur = dchan->put = RING_SKIPS;
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dchan->free = get - (RING_SKIPS + 1);
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}
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} else {
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dchan->free = get - dchan->cur - 1;
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}
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}
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return 0;
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}
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@ -0,0 +1,98 @@
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NOUVEAU_DMA_H__
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#define __NOUVEAU_DMA_H__
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typedef enum {
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NvSubM2MF = 0,
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} nouveau_subchannel_id_t;
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typedef enum {
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NvM2MF = 0x80039001,
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NvDmaFB = 0x8003d001,
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NvDmaTT = 0x8003d002,
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NvNotify0 = 0x8003d003
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} nouveau_object_handle_t;
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#define NV_MEMORY_TO_MEMORY_FORMAT 0x00000039
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#define NV_MEMORY_TO_MEMORY_FORMAT_NAME 0x00000000
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#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF 0x00000050
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE 0x00000000
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN 0x00000001
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#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY 0x00000180
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#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE 0x00000184
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#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
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#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039
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#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200 0x00000200
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#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C 0x0000021c
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#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238
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#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c
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#define BEGIN_RING(subc, mthd, cnt) do { \
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int push_size = (cnt) + 1; \
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if (dchan->push_free) { \
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DRM_ERROR("prior packet incomplete: %d\n", dchan->push_free); \
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break; \
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} \
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if (dchan->free < push_size) { \
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if (nouveau_dma_wait(dev, push_size)) { \
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DRM_ERROR("FIFO timeout\n"); \
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break; \
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} \
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} \
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dchan->free -= push_size; \
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dchan->push_free = push_size; \
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OUT_RING(((cnt)<<18) | ((subc)<<15) | mthd); \
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} while(0)
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#define OUT_RING(data) do { \
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if (dchan->push_free == 0) { \
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DRM_ERROR("no space left in packet\n"); \
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break; \
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} \
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dchan->pushbuf[dchan->cur++] = (data); \
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dchan->push_free--; \
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} while(0)
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#define FIRE_RING() do { \
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if (dchan->push_free) { \
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DRM_ERROR("packet incomplete: %d\n", dchan->push_free); \
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break; \
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} \
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if (dchan->cur != dchan->put) { \
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DRM_MEMORYBARRIER(); \
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dchan->put = dchan->cur; \
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NV_WRITE(NV03_FIFO_REGS_DMAPUT(dchan->chan->id), \
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(dchan->put<<2)); \
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} \
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} while(0)
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#endif
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