Move os-dependent stuff out of radeon_irq.c
parent
e6901cad69
commit
9243e642da
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@ -597,7 +597,6 @@ int DRM(control)( DRM_IOCTL_ARGS )
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}
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#if __HAVE_VBL_IRQ
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int DRM(wait_vblank)( DRM_IOCTL_ARGS )
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{
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DRM_DEVICE;
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@ -139,6 +139,21 @@ do { \
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} \
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} while (0)
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#define DRM_HZ hz
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#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
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do { \
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if (condition) \
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break; \
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ret = tsleep( &(queue), PZERO | PCATCH, "rdnirq", (timeout) ); \
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if ( (ret == EWOULDBLOCK) || (ret == EINTR) ) \
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return DRM_ERR(EBUSY); \
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} while (1)
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#define DRM_WAKEUP( queue ) wakeup( queue )
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#define DRM_WAKEUP_INT( queue ) wakeup( queue )
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#define DRM_INIT_WAITQUEUE( queue ) do {} while (0)
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#define DRM_COPY_TO_USER_IOCTL(user, kern, size) \
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if ( IOCPARM_LEN(cmd) != size) \
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return EINVAL; \
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@ -173,8 +188,6 @@ do { \
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__asm __volatile("" : : : "memory"); \
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} while (0)
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#define DRM_WAKEUP(w) wakeup(w)
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#define DRM_WAKEUP_INT(w) wakeup(w)
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#define PAGE_ALIGN(addr) round_page(addr)
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@ -597,7 +597,6 @@ int DRM(control)( DRM_IOCTL_ARGS )
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}
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#if __HAVE_VBL_IRQ
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int DRM(wait_vblank)( DRM_IOCTL_ARGS )
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{
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DRM_DEVICE;
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@ -139,6 +139,21 @@ do { \
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} \
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} while (0)
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#define DRM_HZ hz
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#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
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do { \
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if (condition) \
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break; \
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ret = tsleep( &(queue), PZERO | PCATCH, "rdnirq", (timeout) ); \
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if ( (ret == EWOULDBLOCK) || (ret == EINTR) ) \
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return DRM_ERR(EBUSY); \
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} while (1)
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#define DRM_WAKEUP( queue ) wakeup( queue )
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#define DRM_WAKEUP_INT( queue ) wakeup( queue )
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#define DRM_INIT_WAITQUEUE( queue ) do {} while (0)
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#define DRM_COPY_TO_USER_IOCTL(user, kern, size) \
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if ( IOCPARM_LEN(cmd) != size) \
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return EINVAL; \
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@ -173,8 +188,6 @@ do { \
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__asm __volatile("" : : : "memory"); \
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} while (0)
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#define DRM_WAKEUP(w) wakeup(w)
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#define DRM_WAKEUP_INT(w) wakeup(w)
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#define PAGE_ALIGN(addr) round_page(addr)
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@ -44,16 +44,47 @@
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#define DRM_MALLOC(x) kmalloc(x, GFP_KERNEL)
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#define DRM_FREE(x) kfree(x)
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#define DRM_GETSAREA() \
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do { \
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struct list_head *list; \
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list_for_each( list, &dev->maplist->head ) { \
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drm_map_list_t *entry = (drm_map_list_t *)list; \
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if ( entry->map && \
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entry->map->type == _DRM_SHM && \
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(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
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dev_priv->sarea = entry->map; \
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break; \
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} \
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} \
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#define DRM_GETSAREA() \
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do { \
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struct list_head *list; \
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list_for_each( list, &dev->maplist->head ) { \
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drm_map_list_t *entry = (drm_map_list_t *)list; \
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if ( entry->map && \
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entry->map->type == _DRM_SHM && \
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(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
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dev_priv->sarea = entry->map; \
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break; \
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} \
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} \
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} while (0)
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#define DRM_HZ HZ
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#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
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do { \
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DECLARE_WAITQUEUE(entry, current); \
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unsigned long end = jiffies + (timeout); \
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add_wait_queue(&(queue), &entry); \
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\
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for (;;) { \
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current->state = TASK_INTERRUPTIBLE; \
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if (condition) \
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break; \
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if((signed)(end - jiffies) <= 0) { \
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ret = -EBUSY; \
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break; \
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} \
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schedule_timeout(max(HZ/100,1)); \
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if (signal_pending(current)) { \
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ret = -EINTR; \
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break; \
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} \
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} \
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current->state = TASK_RUNNING; \
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remove_wait_queue(&(queue), &entry); \
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} while (0)
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#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
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#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
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@ -44,16 +44,47 @@
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#define DRM_MALLOC(x) kmalloc(x, GFP_KERNEL)
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#define DRM_FREE(x) kfree(x)
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#define DRM_GETSAREA() \
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do { \
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struct list_head *list; \
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list_for_each( list, &dev->maplist->head ) { \
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drm_map_list_t *entry = (drm_map_list_t *)list; \
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if ( entry->map && \
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entry->map->type == _DRM_SHM && \
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(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
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dev_priv->sarea = entry->map; \
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break; \
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} \
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} \
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#define DRM_GETSAREA() \
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do { \
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struct list_head *list; \
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list_for_each( list, &dev->maplist->head ) { \
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drm_map_list_t *entry = (drm_map_list_t *)list; \
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if ( entry->map && \
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entry->map->type == _DRM_SHM && \
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(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
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dev_priv->sarea = entry->map; \
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break; \
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} \
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} \
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} while (0)
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#define DRM_HZ HZ
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#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
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do { \
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DECLARE_WAITQUEUE(entry, current); \
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unsigned long end = jiffies + (timeout); \
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add_wait_queue(&(queue), &entry); \
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\
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for (;;) { \
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current->state = TASK_INTERRUPTIBLE; \
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if (condition) \
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break; \
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if((signed)(end - jiffies) <= 0) { \
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ret = -EBUSY; \
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break; \
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} \
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schedule_timeout(max(HZ/100,1)); \
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if (signal_pending(current)) { \
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ret = -EINTR; \
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break; \
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} \
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} \
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current->state = TASK_RUNNING; \
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remove_wait_queue(&(queue), &entry); \
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} while (0)
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#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
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#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
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@ -1018,7 +1018,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
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}
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dev_priv->is_r200 = (init->func == RADEON_INIT_R200_CP);
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dev_priv->do_boxes = 0;
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dev_priv->do_boxes = 1;
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dev_priv->cp_mode = init->cp_mode;
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/* We don't support anything other than bus-mastering ring mode,
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@ -59,42 +59,36 @@ void DRM(dma_service)( DRM_IRQ_ARGS )
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drm_device_t *dev = (drm_device_t *) arg;
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drm_radeon_private_t *dev_priv =
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(drm_radeon_private_t *)dev->dev_private;
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u32 stat, ack = 0;
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u32 stat;
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/* Need to wait for fifo to drain?
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*/
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stat = RADEON_READ(RADEON_GEN_INT_STATUS);
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if (!stat)
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return;
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/* SW interrupt */
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if (stat & RADEON_SW_INT_TEST) {
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ack |= RADEON_SW_INT_TEST_ACK;
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#ifdef __linux__
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wake_up_interruptible(&dev_priv->swi_queue);
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#endif
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#ifdef __FreeBSD__
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wakeup(&dev->vbl_queue);
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#endif
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DRM_WAKEUP( &dev_priv->swi_queue );
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}
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#if __HAVE_VBL_IRQ
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/* VBLANK interrupt */
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if (stat & RADEON_CRTC_VBLANK_STAT) {
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ack |= RADEON_CRTC_VBLANK_STAT_ACK;
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atomic_inc(&dev->vbl_received);
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#ifdef __linux__
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wake_up_interruptible(&dev->vbl_queue);
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#endif
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#ifdef __FreeBSD__
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wakeup(&dev->vbl_queue);
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#endif
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DRM_WAKEUP(&dev->vbl_queue);
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}
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#endif
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if (ack)
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RADEON_WRITE(RADEON_GEN_INT_STATUS, ack);
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/* Acknowledge all the bits in GEN_INT_STATUS -- seem to get
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* more than we asked for...
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*/
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RADEON_WRITE(RADEON_GEN_INT_STATUS, stat);
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}
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static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv)
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{
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RADEON_WRITE( RADEON_GEN_INT_STATUS, RADEON_READ( RADEON_GEN_INT_STATUS ) );
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u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS );
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if (tmp)
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RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp );
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}
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int radeon_emit_irq(drm_device_t *dev)
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@ -120,52 +114,22 @@ int radeon_wait_irq(drm_device_t *dev, int swi_nr)
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{
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drm_radeon_private_t *dev_priv =
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(drm_radeon_private_t *)dev->dev_private;
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#ifdef __linux__
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DECLARE_WAITQUEUE(entry, current);
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unsigned long end = jiffies + HZ*3;
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#endif /* __linux__ */
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int ret = 0;
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if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
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return 0;
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dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
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/* This is a hack to work around mysterious freezes on certain
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* systems:
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*/
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radeon_acknowledge_irqs( dev_priv );
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#ifdef __linux__
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add_wait_queue(&dev_priv->swi_queue, &entry);
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DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * DRM_HZ,
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RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr );
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for (;;) {
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current->state = TASK_INTERRUPTIBLE;
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if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
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break;
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if((signed)(end - jiffies) <= 0) {
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ret = -EBUSY; /* Lockup? Missed irq? */
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break;
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}
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schedule_timeout(max(HZ/100,1));
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if (signal_pending(current)) {
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ret = -EINTR;
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break;
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}
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}
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current->state = TASK_RUNNING;
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remove_wait_queue(&dev_priv->swi_queue, &entry);
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return ret;
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#endif /* __linux__ */
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#ifdef __FreeBSD__
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for (;;) {
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if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
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break;
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ret = tsleep( &dev_priv->swi_queue, PZERO | PCATCH, \
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"rdnirq", 3*hz );
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if (ret)
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break;
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}
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return ret;
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#endif /* __FreeBSD__ */
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}
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int radeon_emit_and_wait_irq(drm_device_t *dev)
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@ -174,7 +138,8 @@ int radeon_emit_and_wait_irq(drm_device_t *dev)
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}
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int radeon_vblank_wait(drm_device_t *dev, unsigned int *sequence)
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#if __HAVE_VBL_IRQ
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int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
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{
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drm_radeon_private_t *dev_priv =
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(drm_radeon_private_t *)dev->dev_private;
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@ -186,34 +151,23 @@ int radeon_vblank_wait(drm_device_t *dev, unsigned int *sequence)
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return DRM_ERR(EINVAL);
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}
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/* Assume that the user has missed the current sequence number by about
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* a day rather than she wants to wait for years using vertical blanks :)
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radeon_acknowledge_irqs( dev_priv );
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dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
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/* Assume that the user has missed the current sequence number
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* by about a day rather than she wants to wait for years
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* using vertical blanks...
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*/
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while ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
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+ ~*sequence + 1 ) > (1<<23) ) {
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dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
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radeon_acknowledge_irqs( dev_priv );
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#ifdef __linux__
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interruptible_sleep_on( &dev->vbl_queue );
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if (signal_pending(current)) {
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ret = -EINTR;
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break;
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}
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#endif /* __linux__ */
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#ifdef __FreeBSD__
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ret = tsleep( &dev->vbl_queue, 3*hz, "rdnvbl", PZERO | PCATCH);
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if (ret)
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break;
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#endif /* __FreeBSD__ */
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}
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DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
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( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
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+ ~*sequence + 1 ) > (1<<23) ) );
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*sequence = cur_vblank;
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return ret;
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}
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#endif
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/* Needs the lock as it touches the ring.
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@ -284,9 +238,7 @@ void DRM(driver_irq_postinstall)( drm_device_t *dev ) {
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(drm_radeon_private_t *)dev->dev_private;
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atomic_set(&dev_priv->swi_emitted, 0);
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#ifdef __linux__
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init_waitqueue_head(&dev_priv->swi_queue);
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#endif
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DRM_INIT_WAITQUEUE( &dev_priv->swi_queue );
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/* Turn on SW and VBL ints */
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RADEON_WRITE( RADEON_GEN_INT_CNTL,
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@ -100,6 +100,13 @@
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 },
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#define USE_IRQS 1
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#if USE_IRQS
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_VBL_IRQ 1
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#define __HAVE_SHARED_IRQ 1
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/* When a client dies:
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* - Check for and clean up flipped page state
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* - Free any alloced agp memory.
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@ -128,13 +135,14 @@
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} \
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} while (0)
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#else
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#define __HAVE_DMA_IRQ 0
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#endif
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_VBL_IRQ 1
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#define __HAVE_SHARED_IRQ 1
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/* Buffer customization:
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*/
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@ -1018,7 +1018,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
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}
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dev_priv->is_r200 = (init->func == RADEON_INIT_R200_CP);
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dev_priv->do_boxes = 0;
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dev_priv->do_boxes = 1;
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dev_priv->cp_mode = init->cp_mode;
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/* We don't support anything other than bus-mastering ring mode,
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@ -59,42 +59,36 @@ void DRM(dma_service)( DRM_IRQ_ARGS )
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drm_device_t *dev = (drm_device_t *) arg;
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drm_radeon_private_t *dev_priv =
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(drm_radeon_private_t *)dev->dev_private;
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u32 stat, ack = 0;
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u32 stat;
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/* Need to wait for fifo to drain?
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*/
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stat = RADEON_READ(RADEON_GEN_INT_STATUS);
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if (!stat)
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return;
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/* SW interrupt */
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if (stat & RADEON_SW_INT_TEST) {
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ack |= RADEON_SW_INT_TEST_ACK;
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#ifdef __linux__
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wake_up_interruptible(&dev_priv->swi_queue);
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#endif
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#ifdef __FreeBSD__
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wakeup(&dev->vbl_queue);
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#endif
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DRM_WAKEUP( &dev_priv->swi_queue );
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}
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#if __HAVE_VBL_IRQ
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/* VBLANK interrupt */
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if (stat & RADEON_CRTC_VBLANK_STAT) {
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ack |= RADEON_CRTC_VBLANK_STAT_ACK;
|
||||
atomic_inc(&dev->vbl_received);
|
||||
#ifdef __linux__
|
||||
wake_up_interruptible(&dev->vbl_queue);
|
||||
#endif
|
||||
#ifdef __FreeBSD__
|
||||
wakeup(&dev->vbl_queue);
|
||||
#endif
|
||||
DRM_WAKEUP(&dev->vbl_queue);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ack)
|
||||
RADEON_WRITE(RADEON_GEN_INT_STATUS, ack);
|
||||
/* Acknowledge all the bits in GEN_INT_STATUS -- seem to get
|
||||
* more than we asked for...
|
||||
*/
|
||||
RADEON_WRITE(RADEON_GEN_INT_STATUS, stat);
|
||||
}
|
||||
|
||||
static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv)
|
||||
{
|
||||
RADEON_WRITE( RADEON_GEN_INT_STATUS, RADEON_READ( RADEON_GEN_INT_STATUS ) );
|
||||
u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS );
|
||||
if (tmp)
|
||||
RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp );
|
||||
}
|
||||
|
||||
int radeon_emit_irq(drm_device_t *dev)
|
||||
|
@ -120,52 +114,22 @@ int radeon_wait_irq(drm_device_t *dev, int swi_nr)
|
|||
{
|
||||
drm_radeon_private_t *dev_priv =
|
||||
(drm_radeon_private_t *)dev->dev_private;
|
||||
#ifdef __linux__
|
||||
DECLARE_WAITQUEUE(entry, current);
|
||||
unsigned long end = jiffies + HZ*3;
|
||||
#endif /* __linux__ */
|
||||
int ret = 0;
|
||||
|
||||
if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
|
||||
return 0;
|
||||
|
||||
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
|
||||
|
||||
/* This is a hack to work around mysterious freezes on certain
|
||||
* systems:
|
||||
*/
|
||||
radeon_acknowledge_irqs( dev_priv );
|
||||
|
||||
#ifdef __linux__
|
||||
add_wait_queue(&dev_priv->swi_queue, &entry);
|
||||
DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * DRM_HZ,
|
||||
RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr );
|
||||
|
||||
for (;;) {
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
|
||||
break;
|
||||
if((signed)(end - jiffies) <= 0) {
|
||||
ret = -EBUSY; /* Lockup? Missed irq? */
|
||||
break;
|
||||
}
|
||||
schedule_timeout(max(HZ/100,1));
|
||||
if (signal_pending(current)) {
|
||||
ret = -EINTR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
current->state = TASK_RUNNING;
|
||||
remove_wait_queue(&dev_priv->swi_queue, &entry);
|
||||
return ret;
|
||||
#endif /* __linux__ */
|
||||
|
||||
#ifdef __FreeBSD__
|
||||
for (;;) {
|
||||
if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)
|
||||
break;
|
||||
ret = tsleep( &dev_priv->swi_queue, PZERO | PCATCH, \
|
||||
"rdnirq", 3*hz );
|
||||
if (ret)
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
#endif /* __FreeBSD__ */
|
||||
}
|
||||
|
||||
int radeon_emit_and_wait_irq(drm_device_t *dev)
|
||||
|
@ -174,7 +138,8 @@ int radeon_emit_and_wait_irq(drm_device_t *dev)
|
|||
}
|
||||
|
||||
|
||||
int radeon_vblank_wait(drm_device_t *dev, unsigned int *sequence)
|
||||
#if __HAVE_VBL_IRQ
|
||||
int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
|
||||
{
|
||||
drm_radeon_private_t *dev_priv =
|
||||
(drm_radeon_private_t *)dev->dev_private;
|
||||
|
@ -186,34 +151,23 @@ int radeon_vblank_wait(drm_device_t *dev, unsigned int *sequence)
|
|||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
/* Assume that the user has missed the current sequence number by about
|
||||
* a day rather than she wants to wait for years using vertical blanks :)
|
||||
radeon_acknowledge_irqs( dev_priv );
|
||||
|
||||
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
|
||||
|
||||
/* Assume that the user has missed the current sequence number
|
||||
* by about a day rather than she wants to wait for years
|
||||
* using vertical blanks...
|
||||
*/
|
||||
while ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
|
||||
+ ~*sequence + 1 ) > (1<<23) ) {
|
||||
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
|
||||
|
||||
radeon_acknowledge_irqs( dev_priv );
|
||||
|
||||
#ifdef __linux__
|
||||
interruptible_sleep_on( &dev->vbl_queue );
|
||||
|
||||
if (signal_pending(current)) {
|
||||
ret = -EINTR;
|
||||
break;
|
||||
}
|
||||
#endif /* __linux__ */
|
||||
#ifdef __FreeBSD__
|
||||
ret = tsleep( &dev->vbl_queue, 3*hz, "rdnvbl", PZERO | PCATCH);
|
||||
if (ret)
|
||||
break;
|
||||
#endif /* __FreeBSD__ */
|
||||
}
|
||||
DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
|
||||
( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
|
||||
+ ~*sequence + 1 ) > (1<<23) ) );
|
||||
|
||||
*sequence = cur_vblank;
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* Needs the lock as it touches the ring.
|
||||
|
@ -284,9 +238,7 @@ void DRM(driver_irq_postinstall)( drm_device_t *dev ) {
|
|||
(drm_radeon_private_t *)dev->dev_private;
|
||||
|
||||
atomic_set(&dev_priv->swi_emitted, 0);
|
||||
#ifdef __linux__
|
||||
init_waitqueue_head(&dev_priv->swi_queue);
|
||||
#endif
|
||||
DRM_INIT_WAITQUEUE( &dev_priv->swi_queue );
|
||||
|
||||
/* Turn on SW and VBL ints */
|
||||
RADEON_WRITE( RADEON_GEN_INT_CNTL,
|
||||
|
|
Loading…
Reference in New Issue