amdgpu:support 16 ibs per submit for PAL/SRIOV
to support SRIOV and MCBP, need 16 IBs per submit Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>main
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@ -53,7 +53,7 @@ struct drm_amdgpu_info_hw_ip;
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*
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* \sa amdgpu_cs_ib_info
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*/
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#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 4
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#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 16
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/**
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* Special timeout value meaning that the timeout is infinite.
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