amdgpu:support 16 ibs per submit for PAL/SRIOV

to support SRIOV and MCBP, need 16 IBs per submit

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
main
Qiang Yu 2017-03-07 15:00:34 +08:00 committed by Marek Olšák
parent 28370370af
commit 924f856a90
1 changed files with 1 additions and 1 deletions

View File

@ -53,7 +53,7 @@ struct drm_amdgpu_info_hw_ip;
*
* \sa amdgpu_cs_ib_info
*/
#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 4
#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 16
/**
* Special timeout value meaning that the timeout is infinite.