freedreno: sync uapi header

Signed-off-by: Rob Clark <robclark@freedesktop.org>
main
Rob Clark 2016-08-15 12:52:31 -04:00
parent f803a45e74
commit 9270d984cd
2 changed files with 22 additions and 2 deletions

View File

@ -50,6 +50,15 @@ extern "C" {
#define MSM_PIPE_2D1 0x02 #define MSM_PIPE_2D1 0x02
#define MSM_PIPE_3D0 0x10 #define MSM_PIPE_3D0 0x10
/* The pipe-id just uses the lower bits, so can be OR'd with flags in
* the upper 16 bits (which could be extended further, if needed, maybe
* we extend/overload the pipe-id some day to deal with multiple rings,
* but even then I don't think we need the full lower 16 bits).
*/
#define MSM_PIPE_ID_MASK 0xffff
#define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK)
#define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK)
/* timeouts are specified in clock-monotonic absolute times (to simplify /* timeouts are specified in clock-monotonic absolute times (to simplify
* restarting interrupted ioctls). The following struct is logically the * restarting interrupted ioctls). The following struct is logically the
* same as 'struct timespec' but 32/64b ABI safe. * same as 'struct timespec' but 32/64b ABI safe.
@ -183,17 +192,28 @@ struct drm_msm_gem_submit_bo {
__u64 presumed; /* in/out, presumed buffer address */ __u64 presumed; /* in/out, presumed buffer address */
}; };
/* Valid submit ioctl flags: */
#define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */
#define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */
#define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 /* enable output fence_fd */
#define MSM_SUBMIT_FLAGS ( \
MSM_SUBMIT_NO_IMPLICIT | \
MSM_SUBMIT_FENCE_FD_IN | \
MSM_SUBMIT_FENCE_FD_OUT | \
0)
/* Each cmdstream submit consists of a table of buffers involved, and /* Each cmdstream submit consists of a table of buffers involved, and
* one or more cmdstream buffers. This allows for conditional execution * one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds. * (context-restore), and IB buffers needed for per tile/bin draw cmds.
*/ */
struct drm_msm_gem_submit { struct drm_msm_gem_submit {
__u32 pipe; /* in, MSM_PIPE_x */ __u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */
__u32 fence; /* out */ __u32 fence; /* out */
__u32 nr_bos; /* in, number of submit_bo's */ __u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */ __u32 nr_cmds; /* in, number of submit_cmd's */
__u64 __user bos; /* in, ptr to array of submit_bo's */ __u64 __user bos; /* in, ptr to array of submit_bo's */
__u64 __user cmds; /* in, ptr to array of submit_cmd's */ __u64 __user cmds; /* in, ptr to array of submit_cmd's */
__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
}; };
/* The normal way to synchronize with the GPU is just to CPU_PREP on /* The normal way to synchronize with the GPU is just to CPU_PREP on

View File

@ -399,7 +399,7 @@ static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start
{ {
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring); struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct drm_msm_gem_submit req = { struct drm_msm_gem_submit req = {
.pipe = to_msm_pipe(ring->pipe)->pipe, .flags = to_msm_pipe(ring->pipe)->pipe,
}; };
uint32_t i; uint32_t i;
int ret; int ret;