geemili
/
drm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

amdgpu: cleanup VA IOCTL handling 

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
main
Christian König 2015-06-08 15:05:07 +02:00 committed by Alex Deucher
parent 804048ff65
commit 933091e1d6
2 changed files with 18 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
amdgpu/amdgpu_bo.c
View File

@ -56,7 +56,7 @@ static void amdgpu_close_kms_handle(amdgpu_device_handle dev,
static int amdgpu_bo_map(amdgpu_bo_handle bo, uint32_t alignment)
{
amdgpu_device_handle dev = bo->dev;
union drm_amdgpu_gem_va va;
struct drm_amdgpu_gem_va va;
int r;
memset(&va, 0, sizeof(va));
@ -67,17 +67,17 @@ static int amdgpu_bo_map(amdgpu_bo_handle bo, uint32_t alignment)
if (bo->virtual_mc_base_address == AMDGPU_INVALID_VA_ADDRESS)
return -ENOSPC;
va.in.handle = bo->handle;
va.in.operation = AMDGPU_VA_OP_MAP;
va.in.flags = AMDGPU_VM_PAGE_READABLE |
va.handle = bo->handle;
va.operation = AMDGPU_VA_OP_MAP;
va.flags = AMDGPU_VM_PAGE_READABLE |
AMDGPU_VM_PAGE_WRITEABLE |
AMDGPU_VM_PAGE_EXECUTABLE;
va.in.va_address = bo->virtual_mc_base_address;
va.in.offset_in_bo = 0;
va.in.map_size = ALIGN(bo->alloc_size, getpagesize());
va.va_address = bo->virtual_mc_base_address;
va.offset_in_bo = 0;
va.map_size = ALIGN(bo->alloc_size, getpagesize());
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va, sizeof(va));
if (r || va.out.result == AMDGPU_VA_RESULT_ERROR) {
if (r) {
amdgpu_bo_free_internal(bo);
return r;
}
@ -89,7 +89,7 @@ static int amdgpu_bo_map(amdgpu_bo_handle bo, uint32_t alignment)
static void amdgpu_bo_unmap(amdgpu_bo_handle bo)
{
amdgpu_device_handle dev = bo->dev;
union drm_amdgpu_gem_va va;
struct drm_amdgpu_gem_va va;
int r;
if (bo->virtual_mc_base_address == AMDGPU_INVALID_VA_ADDRESS)
@ -97,17 +97,17 @@ static void amdgpu_bo_unmap(amdgpu_bo_handle bo)
memset(&va, 0, sizeof(va));
va.in.handle = bo->handle;
va.in.operation = AMDGPU_VA_OP_UNMAP;
va.in.flags = AMDGPU_VM_PAGE_READABLE |
va.handle = bo->handle;
va.operation = AMDGPU_VA_OP_UNMAP;
va.flags = AMDGPU_VM_PAGE_READABLE |
AMDGPU_VM_PAGE_WRITEABLE |
AMDGPU_VM_PAGE_EXECUTABLE;
va.in.va_address = bo->virtual_mc_base_address;
va.in.offset_in_bo = 0;
va.in.map_size = ALIGN(bo->alloc_size, getpagesize());
va.va_address = bo->virtual_mc_base_address;
va.offset_in_bo = 0;
va.map_size = ALIGN(bo->alloc_size, getpagesize());
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va, sizeof(va));
if (r || va.out.result == AMDGPU_VA_RESULT_ERROR) {
if (r) {
fprintf(stderr, "amdgpu: VA_OP_UNMAP failed with %d\n", r);
return;
}

18
include/drm/amdgpu_drm.h
View File

@ -55,7 +55,7 @@
#define DRM_IOCTL_AMDGPU_INFO DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_INFO, struct drm_amdgpu_info)
#define DRM_IOCTL_AMDGPU_GEM_METADATA DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_METADATA, struct drm_amdgpu_gem_metadata)
#define DRM_IOCTL_AMDGPU_GEM_WAIT_IDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_WAIT_IDLE, union drm_amdgpu_gem_wait_idle)
#define DRM_IOCTL_AMDGPU_GEM_VA DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_VA, union drm_amdgpu_gem_va)
#define DRM_IOCTL_AMDGPU_GEM_VA DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_VA, struct drm_amdgpu_gem_va)
#define DRM_IOCTL_AMDGPU_WAIT_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_CS, union drm_amdgpu_wait_cs)
#define DRM_IOCTL_AMDGPU_GEM_OP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_OP, struct drm_amdgpu_gem_op)
#define DRM_IOCTL_AMDGPU_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr)
@ -290,10 +290,6 @@ struct drm_amdgpu_gem_op {
#define AMDGPU_VA_OP_MAP 1
#define AMDGPU_VA_OP_UNMAP 2
#define AMDGPU_VA_RESULT_OK 0
#define AMDGPU_VA_RESULT_ERROR 1
#define AMDGPU_VA_RESULT_VA_INVALID_ALIGNMENT 2
/* Mapping flags */
/* readable mapping */
#define AMDGPU_VM_PAGE_READABLE (1 << 1)
@ -302,7 +298,7 @@ struct drm_amdgpu_gem_op {
/* executable mapping, new for VI */
#define AMDGPU_VM_PAGE_EXECUTABLE (1 << 3)
struct drm_amdgpu_gem_va_in {
struct drm_amdgpu_gem_va {
/* GEM object handle */
uint32_t handle;
uint32_t _pad;
@ -319,16 +315,6 @@ struct drm_amdgpu_gem_va_in {
uint64_t map_size;
};
struct drm_amdgpu_gem_va_out {
uint32_t result;
uint32_t _pad;
};
union drm_amdgpu_gem_va {
struct drm_amdgpu_gem_va_in in;
struct drm_amdgpu_gem_va_out out;
};
#define AMDGPU_HW_IP_GFX 0
#define AMDGPU_HW_IP_COMPUTE 1
#define AMDGPU_HW_IP_DMA 2