Some info on NV40's RAMFC
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93fee5cf22
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@ -178,4 +178,26 @@
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#define NV03_FIFO_CMD_JUMP_OFFSET_MASK 0x1ffffffc
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#define NV03_FIFO_CMD_REWIND (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
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/* RAMFC offsets */
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#define NV40_RAMFC_DMA_PUT 0x00
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#define NV40_RAMFC_DMA_GET 0x04
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#define NV40_RAMFC_REF_CNT 0x08
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#define NV40_RAMFC_DMA_INSTANCE 0x0C
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#define NV40_RAMFC_DMA_DCOUNT /* ? */ 0x10
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#define NV40_RAMFC_DMA_STATE 0x14
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#define NV40_RAMFC_DMA_FETCH 0x18
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#define NV40_RAMFC_ENGINE 0x1C
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#define NV40_RAMFC_PULL1_ENGINE 0x20
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#define NV40_RAMFC_ACQUIRE_VALUE 0x24
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#define NV40_RAMFC_ACQUIRE_TIMESTAMP 0x28
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#define NV40_RAMFC_ACQUIRE_TIMEOUT 0x2C
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#define NV40_RAMFC_SEMAPHORE 0x30
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#define NV40_RAMFC_DMA_SUBROUTINE 0x34
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#define NV40_RAMFC_GRCTX_INSTANCE_32E0 /* guess */ 0x38
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#define NV40_RAMFC_DMA_TIMESLICE 0x3C
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#define NV40_RAMFC_UNK_40 0x40
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#define NV40_RAMFC_UNK_44 0x44
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#define NV40_RAMFC_UNK_48 0x48
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#define NV40_RAMFC_2088 0x4C
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#define NV40_RAMFC_3300 0x50
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