import Thomas' shared-core via changes up to 2.4.1
Keith Whitwell
parent
17d893f567
commit
9904319b95
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@ -30,11 +30,11 @@
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#define DRIVER_NAME "via"
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#define DRIVER_DESC "VIA Unichrome"
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#define DRIVER_DATE "20041231"
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#define DRIVER_DATE "20050106"
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#define DRIVER_MAJOR 2
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#define DRIVER_MINOR 3
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#define DRIVER_PATCHLEVEL 4
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#define DRIVER_MINOR 4
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#define DRIVER_PATCHLEVEL 1
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#define DRIVER_IOCTLS \
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[DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \
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@ -1643,4 +1643,9 @@
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#define HC_HAGPBpID_STOP 0x00000002
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#define HC_HAGPBpH_MASK 0x00ffffff
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#define VIA_VIDEO_HEADER5 0xFE040000
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#define VIA_VIDEO_HEADER6 0xFE050000
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#define VIA_VIDEO_HEADER7 0xFE060000
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#define VIA_VIDEOMASK 0xFFFF0000
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#endif
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@ -299,12 +299,12 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
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return 0;
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}
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static int via_quiescent(drm_device_t * dev)
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int via_driver_dma_quiescent(drm_device_t * dev)
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{
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drm_via_private_t *dev_priv = dev->dev_private;
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if (!via_wait_idle(dev_priv)) {
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return DRM_ERR(EAGAIN);
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return DRM_ERR(EBUSY);
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}
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return 0;
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}
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@ -315,7 +315,7 @@ int via_flush_ioctl(DRM_IOCTL_ARGS)
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LOCK_TEST_WITH_RETURN( dev, filp );
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return via_quiescent(dev);
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return via_driver_dma_quiescent(dev);
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}
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int via_cmdbuffer(DRM_IOCTL_ARGS)
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@ -75,6 +75,7 @@ extern void via_driver_irq_uninstall(drm_device_t * dev);
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extern int via_dma_cleanup(drm_device_t * dev);
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extern int via_wait_idle(drm_via_private_t * dev_priv);
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extern int via_driver_dma_quiescent(drm_device_t * dev);
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extern void via_init_command_verifier( void );
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extern int via_verify_command_stream(const uint32_t * buf, unsigned int size,
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drm_device_t *dev);
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@ -44,53 +44,37 @@
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/* VIA_REG_INTERRUPT */
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#define VIA_IRQ_GLOBAL (1 << 31)
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#define VIA_IRQ_VBI_ENABLE (1 << 19)
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#define VIA_IRQ_SEC_VBI_ENABLE (1 << 17)
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#define VIA_IRQ_SEC_VBI_PENDING (1 << 15)
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#define VIA_IRQ_VBI_PENDING (1 << 3)
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static unsigned time_diff(struct timeval *now,struct timeval *then)
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{
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return (now->tv_usec >= then->tv_usec) ?
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now->tv_usec - then->tv_usec :
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1000000 - (then->tv_usec - now->tv_usec);
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}
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irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
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{
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drm_device_t *dev = (drm_device_t *) arg;
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drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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u32 status;
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int handled = 0;
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struct timeval cur_vblank;
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int handled = IRQ_NONE;
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u32 status = VIA_READ(VIA_REG_INTERRUPT);
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status = VIA_READ(VIA_REG_INTERRUPT);
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if (status & VIA_IRQ_VBI_PENDING) {
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atomic_inc(&dev->vbl_received);
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if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
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do_gettimeofday(&cur_vblank);
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if (dev_priv->last_vblank_valid) {
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dev_priv->usec_per_vblank =
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time_diff( &cur_vblank,&dev_priv->last_vblank) >> 4;
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}
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dev_priv->last_vblank = cur_vblank;
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dev_priv->last_vblank_valid = 1;
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}
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if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
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DRM_DEBUG("US per vblank is: %u\n",
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dev_priv->usec_per_vblank);
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}
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DRM_WAKEUP(&dev->vbl_queue);
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DRM(vbl_send_signals) (dev);
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handled = 1;
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handled = IRQ_HANDLED;
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}
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/* Acknowlege interrupts ?? */
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VIA_WRITE(VIA_REG_INTERRUPT, status);
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#if 0
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if (status & VIA_IRQ_SEC_VBI_PENDING) {
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atomic_inc(&dev->sec_vbl_received);
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DRM_WAKEUP(&dev->sec_vbl_queue);
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DRM(vbl_send_signals)(dev); /* KW: Need a parameter here? */
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handled = IRQ_HANDLED;
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}
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#endif
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if (handled)
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return IRQ_HANDLED;
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else
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return IRQ_NONE;
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VIA_WRITE(VIA_REG_INTERRUPT, status);
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return handled;
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}
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static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
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@ -131,8 +131,12 @@ int via_init_context(struct drm_device *dev, int context)
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}
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int via_final_context(struct drm_device *dev, int context)
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{
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int i;
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{
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int i;
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volatile int *lock;
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drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
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for (i = 0; i < MAX_CONTEXT; i++)
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if (global_ppriv[i].used &&
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(global_ppriv[i].context == context))
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@ -167,6 +171,22 @@ int via_final_context(struct drm_device *dev, int context)
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global_ppriv[i].used = 0;
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}
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/*
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* Release futex locks.
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*/
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for (i=0; i < VIA_NR_XVMC_LOCKS; ++i) {
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lock = XVMCLOCKPTR(sAPriv, i);
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if ( (_DRM_LOCKING_CONTEXT( *lock ) == i) &&
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(_DRM_LOCK_IS_HELD( *lock ))) {
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if ( *lock & _DRM_LOCK_CONT) {
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DRM_WAKEUP( &(dev_priv->decoder_queue[i]));
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}
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*lock &= ~( _DRM_LOCK_HELD | _DRM_LOCK_CONT );
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}
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}
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#if defined(__linux__)
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/* Linux specific until context tracking code gets ported to BSD */
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/* Last context, perform cleanup */
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@ -362,4 +382,5 @@ void DRM(driver_register_fns) (drm_device_t * dev) {
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dev->fn_tbl.irq_postinstall = via_driver_irq_postinstall;
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dev->fn_tbl.irq_uninstall = via_driver_irq_uninstall;
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dev->fn_tbl.irq_handler = via_driver_irq_handler;
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dev->fn_tbl.dma_quiescent = via_driver_dma_quiescent;
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}
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@ -36,6 +36,8 @@ typedef enum{
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state_command,
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state_header2,
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state_header1,
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state_vheader5,
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state_vheader6,
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state_error
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} verifier_state_t;
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@ -72,6 +74,8 @@ typedef enum{
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check_texture_addr7,
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check_texture_addr8,
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check_texture_addr_mode,
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check_for_vertex_count,
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check_number_texunits,
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forbidden_command
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}hazard_t;
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@ -165,7 +169,7 @@ static hz_init_t init_table1[] = {
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{0x7A, no_check},
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{0x7B, no_check},
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{0x7C, no_check},
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{0x7D, no_check}
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{0x7D, check_for_vertex_count}
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};
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@ -232,7 +236,7 @@ static hz_init_t init_table3[] = {
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{0xf2, check_for_header2_err},
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{0xf0, check_for_header1_err},
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{0xcc, check_for_dummy},
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{0x00, no_check}
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{0x00, check_number_texunits}
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};
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@ -254,8 +258,10 @@ typedef struct{
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uint32_t tex_palette_size[2];
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sequence_t unfinished;
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int agp_texture;
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int multitex;
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drm_device_t *dev;
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drm_map_t *map_cache;
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uint32_t vertex_count;
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} sequence_context_t;
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static sequence_context_t hc_sequence;
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@ -497,6 +503,12 @@ investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
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cur_seq->tex_palette_size[cur_seq->texture] =
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(cmd >> 16) & 0x000000007;
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return 0;
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case check_for_vertex_count:
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cur_seq->vertex_count = cmd & 0x0000FFFF;
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return 0;
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case check_number_texunits:
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cur_seq->multitex = (cmd >> 3) & 1;
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return 0;
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default:
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DRM_ERROR("Illegal DMA data: 0x%x\n", cmd);
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return 2;
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@ -505,6 +517,84 @@ investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
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}
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static __inline__ int
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via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
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sequence_context_t *cur_seq)
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{
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uint32_t a_fire, bcmd , dw_count;
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int ret = 0;
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int have_fire;
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const uint32_t *buf = *buffer;
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while(buf < buf_end) {
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have_fire = 0;
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if ((buf_end - buf) < 2) {
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DRM_ERROR("Unexpected termination of primitive list.\n");
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ret = 1;
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break;
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}
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if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB) break;
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bcmd = *buf++;
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if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) {
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DRM_ERROR("Expected Vertex List A command, got 0x%x\n",
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*buf);
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ret = 1;
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break;
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}
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a_fire = *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK | HC_HE3Fire_MASK;
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/*
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* How many dwords per vertex ?
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*/
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if ((bcmd & (0xF << 11)) == 0) {
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DRM_ERROR("Illegal B command vertex data for AGP.\n");
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ret = 1;
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break;
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}
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dw_count = 0;
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if (bcmd & (1 << 7)) dw_count += (cur_seq->multitex) ? 2:1;
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if (bcmd & (1 << 8)) dw_count += (cur_seq->multitex) ? 2:1;
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if (bcmd & (1 << 9)) dw_count++;
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if (bcmd & (1 << 10)) dw_count++;
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if (bcmd & (1 << 11)) dw_count++;
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if (bcmd & (1 << 12)) dw_count++;
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if (bcmd & (1 << 13)) dw_count++;
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if (bcmd & (1 << 14)) dw_count++;
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while(buf < buf_end) {
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if (*buf == HALCYON_HEADER2) {
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DRM_ERROR("Missing Vertex Fire command or verifier "
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"lost sync.\n");
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ret = 1;
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break;
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}
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if (*buf == a_fire) {
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have_fire = 1;
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buf++;
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if (buf < buf_end && *buf == a_fire)
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buf++;
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break;
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}
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if ((ret = eat_words(&buf, buf_end, dw_count)))
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break;
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}
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if (buf >= buf_end && !have_fire) {
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DRM_ERROR("Missing Vertex Fire command or verifier "
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"lost sync.\n");
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ret = 1;
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break;
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}
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}
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*buffer = buf;
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return ret;
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}
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static __inline__ verifier_state_t
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via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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{
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@ -514,6 +604,7 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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const uint32_t *buf = *buffer;
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const hazard_t *hz_table;
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if ((buf_end - buf) < 2) {
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DRM_ERROR("Illegal termination of DMA HALCYON_HEADER2 sequence.\n");
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return state_error;
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@ -523,32 +614,10 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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switch(cmd) {
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case HC_ParaType_CmdVdata:
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/*
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* Command vertex data.
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* It is assumed that the command regulator remains in this state
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* until it encounters a possibly double fire command or a header2 data.
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* FIXME: Vertex data can accidently be header2 or fire.
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* CHECK: What does the regulator do if it encounters a header1
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* cmd?
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*/
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while (buf < buf_end) {
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if (*buf == HALCYON_HEADER2) break;
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if ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD) {
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buf++;
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if ((buf < buf_end) &&
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((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD))
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buf++;
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if ((buf < buf_end) &&
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((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD))
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break;
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}
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buf++;
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}
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if (via_check_prim_list(&buf, buf_end, &hc_sequence ))
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return state_error;
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*buffer = buf;
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return state_command;
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case HC_ParaType_NotTex:
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hz_table = table1;
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break;
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@ -590,7 +659,8 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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*/
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DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 "
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"DMA subcommand: 0x%x\n", cmd);
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"DMA subcommand: 0x%x. Previous dword: 0x%x\n",
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cmd, *(buf -2));
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*buffer = buf;
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return state_error;
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}
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@ -618,6 +688,41 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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}
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static __inline__ int
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verify_mmio_address( uint32_t address)
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{
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if ((address > 0x3FF) && (address < 0xC00 )) {
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DRM_ERROR("Invalid HALCYON_HEADER1 command. "
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"Attempt to access 3D- or command burst area.\n");
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return 1;
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} else if (address > 0xCFF ) {
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DRM_ERROR("Invalid HALCYON_HEADER1 command. "
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"Attempt to access VGA registers.\n");
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return 1;
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}
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return 0;
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}
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static __inline__ int
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verify_video_tail( uint32_t const **buffer, const uint32_t *buf_end, uint32_t dwords)
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{
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const uint32_t *buf = *buffer;
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if (buf_end - buf < dwords) {
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DRM_ERROR("Illegal termination of video command.\n");
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return 1;
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}
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while (dwords--) {
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if (*buf++) {
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DRM_ERROR("Illegal video command tail.\n");
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return 1;
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}
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}
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*buffer = buf;
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return 0;
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}
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static __inline__ verifier_state_t
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via_check_header1( uint32_t const **buffer, const uint32_t *buf_end )
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{
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@ -650,6 +755,75 @@ via_check_header1( uint32_t const **buffer, const uint32_t *buf_end )
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return ret;
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}
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static __inline__ verifier_state_t
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via_check_vheader5( uint32_t const **buffer, const uint32_t *buf_end )
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{
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uint32_t data;
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const uint32_t *buf = *buffer;
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if (buf_end - buf < 4) {
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DRM_ERROR("Illegal termination of video header5 command\n");
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return state_error;
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}
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data = *buf++ & ~VIA_VIDEOMASK;
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if (verify_mmio_address(data))
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return state_error;
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data = *buf++;
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if (*buf++ != 0x00F50000) {
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DRM_ERROR("Illegal header5 header data\n");
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return state_error;
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}
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if (*buf++ != 0x00000000) {
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DRM_ERROR("Illegal header5 header data\n");
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return state_error;
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}
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if (eat_words(&buf, buf_end, data))
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return state_error;
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if (verify_video_tail(&buf, buf_end, 4 - (data & 3)))
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return state_error;
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*buffer = buf;
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return state_command;
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}
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static __inline__ verifier_state_t
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via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end )
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{
|
||||
uint32_t data;
|
||||
const uint32_t *buf = *buffer;
|
||||
uint32_t i;
|
||||
|
||||
DRM_ERROR("H6\n");
|
||||
|
||||
if (buf_end - buf < 4) {
|
||||
DRM_ERROR("Illegal termination of video header6 command\n");
|
||||
return state_error;
|
||||
}
|
||||
|
||||
data = *buf++;
|
||||
if (*buf++ != 0x00F60000) {
|
||||
DRM_ERROR("Illegal header6 header data\n");
|
||||
return state_error;
|
||||
}
|
||||
if (*buf++ != 0x00000000) {
|
||||
DRM_ERROR("Illegal header6 header data\n");
|
||||
return state_error;
|
||||
}
|
||||
if ((buf_end - buf) < (data << 1)) {
|
||||
DRM_ERROR("Illegal termination of video header6 command\n");
|
||||
}
|
||||
for (i=0; i<data; ++i) {
|
||||
if (verify_mmio_address(*buf++))
|
||||
return state_error;
|
||||
buf++;
|
||||
}
|
||||
if (verify_video_tail(&buf, buf_end, 4 - ((data << 1) & 3)))
|
||||
return state_error;
|
||||
*buffer = buf;
|
||||
return state_command;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
|
|
@ -665,6 +839,7 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t
|
|||
hc_sequence.map_cache = NULL;
|
||||
|
||||
while (buf < buf_end) {
|
||||
|
||||
switch (state) {
|
||||
case state_header2:
|
||||
state = via_check_header2( &buf, buf_end );
|
||||
|
|
@ -672,11 +847,21 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t
|
|||
case state_header1:
|
||||
state = via_check_header1( &buf, buf_end );
|
||||
break;
|
||||
case state_vheader5:
|
||||
state = via_check_vheader5( &buf, buf_end );
|
||||
break;
|
||||
case state_vheader6:
|
||||
state = via_check_vheader6( &buf, buf_end );
|
||||
break;
|
||||
case state_command:
|
||||
if (HALCYON_HEADER2 == (cmd = *buf))
|
||||
state = state_header2;
|
||||
else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)
|
||||
state = state_header1;
|
||||
else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
|
||||
state = state_vheader5;
|
||||
else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
|
||||
state = state_vheader6;
|
||||
else {
|
||||
DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n",
|
||||
cmd);
|
||||
|
|
|
|||
Loading…
Reference in New Issue