amdgpu: don't read registers not present on Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>main
parent
c34b28ae9b
commit
99908bfd4c
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@ -182,6 +182,7 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
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dev->info.backend_disable[i] =
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(dev->info.backend_disable[i] >> 16) & 0xff;
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if (dev->info.family_id < AMDGPU_FAMILY_AI) {
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r = amdgpu_read_mm_registers(dev, 0xa0d4, 1, instance, 0,
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&dev->info.pa_sc_raster_cfg[i]);
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if (r)
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@ -194,7 +195,14 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
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return r;
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}
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}
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}
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r = amdgpu_read_mm_registers(dev, 0x263e, 1, 0xffffffff, 0,
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&dev->info.gb_addr_cfg);
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if (r)
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return r;
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if (dev->info.family_id < AMDGPU_FAMILY_AI) {
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r = amdgpu_read_mm_registers(dev, 0x2644, 32, 0xffffffff, 0,
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dev->info.gb_tile_mode);
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if (r)
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@ -207,15 +215,11 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
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return r;
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}
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r = amdgpu_read_mm_registers(dev, 0x263e, 1, 0xffffffff, 0,
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&dev->info.gb_addr_cfg);
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if (r)
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return r;
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r = amdgpu_read_mm_registers(dev, 0x9d8, 1, 0xffffffff, 0,
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&dev->info.mc_arb_ramcfg);
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if (r)
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return r;
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}
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dev->info.cu_active_number = dev->dev_info.cu_active_number;
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dev->info.cu_ao_mask = dev->dev_info.cu_ao_mask;
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