tests/amdgpu: add uvd encode unit tests
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher at amd.com> Acked-by: Christian König <christian.koenig@amd.com>main
Boyuan Zhang
Leo Liu
parent
7ec689a540
commit
9d133dd087
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@ -27,4 +27,5 @@ amdgpu_test_SOURCES = \
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vce_tests.c \
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vce_ib.h \
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frame.h \
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uvd_enc_tests.c \
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vcn_tests.c
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@ -91,6 +91,12 @@ static CU_SuiteInfo suites[] = {
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.pCleanupFunc = suite_vcn_tests_clean,
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.pTests = vcn_tests,
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},
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{
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.pName = "UVD ENC Tests",
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.pInitFunc = suite_uvd_enc_tests_init,
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.pCleanupFunc = suite_uvd_enc_tests_clean,
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.pTests = uvd_enc_tests,
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},
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CU_SUITE_INFO_NULL,
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};
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@ -119,6 +119,21 @@ int suite_vcn_tests_clean();
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+ */
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extern CU_TestInfo vcn_tests[];
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/**
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* Initialize uvd enc test suite
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*/
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int suite_uvd_enc_tests_init();
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/**
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* Deinitialize uvd enc test suite
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*/
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int suite_uvd_enc_tests_clean();
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/**
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* Tests in uvd enc test suite
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*/
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extern CU_TestInfo uvd_enc_tests[];
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/**
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* Helper functions
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*/
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@ -24,7 +24,7 @@
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#ifndef _frame_h_
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#define _frame_h_
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const uint8_t frame[] = {
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static const uint8_t frame[] = {
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0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb,
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0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2,
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0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xaa, 0xaa, 0xaa,
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@ -0,0 +1,500 @@
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdio.h>
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#include <inttypes.h>
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#include "CUnit/Basic.h"
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#include "util_math.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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#include "frame.h"
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#include "uve_ib.h"
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#define IB_SIZE 4096
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#define MAX_RESOURCES 16
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struct amdgpu_uvd_enc_bo {
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amdgpu_bo_handle handle;
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amdgpu_va_handle va_handle;
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uint64_t addr;
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uint64_t size;
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uint8_t *ptr;
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};
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struct amdgpu_uvd_enc {
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unsigned width;
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unsigned height;
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struct amdgpu_uvd_enc_bo session;
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struct amdgpu_uvd_enc_bo vbuf;
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struct amdgpu_uvd_enc_bo bs;
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struct amdgpu_uvd_enc_bo fb;
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struct amdgpu_uvd_enc_bo cpb;
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};
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static uint32_t family_id;
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static amdgpu_context_handle context_handle;
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static amdgpu_bo_handle ib_handle;
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static amdgpu_va_handle ib_va_handle;
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static uint64_t ib_mc_address;
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static uint32_t *ib_cpu;
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static struct amdgpu_uvd_enc enc;
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static amdgpu_bo_handle resources[MAX_RESOURCES];
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static unsigned num_resources;
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static void amdgpu_cs_uvd_enc_create(void);
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static void amdgpu_cs_uvd_enc_session_init(void);
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static void amdgpu_cs_uvd_enc_encode(void);
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static void amdgpu_cs_uvd_enc_destroy(void);
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CU_TestInfo uvd_enc_tests[] = {
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{ "UVD ENC create", amdgpu_cs_uvd_enc_create },
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{ "UVD ENC session init", amdgpu_cs_uvd_enc_session_init },
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{ "UVD ENC encode", amdgpu_cs_uvd_enc_encode },
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{ "UVD ENC destroy", amdgpu_cs_uvd_enc_destroy },
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CU_TEST_INFO_NULL,
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};
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int suite_uvd_enc_tests_init(void)
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{
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int r;
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r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle);
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if (r)
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return CUE_SINIT_FAILED;
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family_id = device_handle->info.family_id;
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if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) {
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printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n");
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return CUE_SUCCESS;
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}
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r = amdgpu_cs_ctx_create(device_handle, &context_handle);
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if (r)
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return CUE_SINIT_FAILED;
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r = amdgpu_bo_alloc_and_map(device_handle, IB_SIZE, 4096,
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AMDGPU_GEM_DOMAIN_GTT, 0,
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&ib_handle, (void**)&ib_cpu,
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&ib_mc_address, &ib_va_handle);
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if (r)
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return CUE_SINIT_FAILED;
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return CUE_SUCCESS;
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}
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int suite_uvd_enc_tests_clean(void)
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{
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int r;
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if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) {
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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return CUE_SUCCESS;
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} else {
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r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
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ib_mc_address, IB_SIZE);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_cs_ctx_free(context_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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}
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return CUE_SUCCESS;
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}
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static int submit(unsigned ndw, unsigned ip)
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{
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struct amdgpu_cs_request ibs_request = {0};
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struct amdgpu_cs_ib_info ib_info = {0};
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struct amdgpu_cs_fence fence_status = {0};
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uint32_t expired;
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int r;
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ib_info.ib_mc_address = ib_mc_address;
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ib_info.size = ndw;
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ibs_request.ip_type = ip;
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r = amdgpu_bo_list_create(device_handle, num_resources, resources,
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NULL, &ibs_request.resources);
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if (r)
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return r;
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ibs_request.number_of_ibs = 1;
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ibs_request.ibs = &ib_info;
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ibs_request.fence_info.handle = NULL;
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r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1);
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if (r)
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return r;
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r = amdgpu_bo_list_destroy(ibs_request.resources);
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if (r)
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return r;
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fence_status.context = context_handle;
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fence_status.ip_type = ip;
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fence_status.fence = ibs_request.seq_no;
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r = amdgpu_cs_query_fence_status(&fence_status,
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AMDGPU_TIMEOUT_INFINITE,
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0, &expired);
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if (r)
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return r;
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return 0;
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}
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static void alloc_resource(struct amdgpu_uvd_enc_bo *uvd_enc_bo,
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unsigned size, unsigned domain)
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{
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struct amdgpu_bo_alloc_request req = {0};
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amdgpu_bo_handle buf_handle;
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amdgpu_va_handle va_handle;
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uint64_t va = 0;
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int r;
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req.alloc_size = ALIGN(size, 4096);
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req.preferred_heap = domain;
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r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_va_range_alloc(device_handle,
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amdgpu_gpu_va_range_general,
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req.alloc_size, 1, 0, &va,
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&va_handle, 0);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0,
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AMDGPU_VA_OP_MAP);
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CU_ASSERT_EQUAL(r, 0);
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uvd_enc_bo->addr = va;
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uvd_enc_bo->handle = buf_handle;
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uvd_enc_bo->size = req.alloc_size;
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uvd_enc_bo->va_handle = va_handle;
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r = amdgpu_bo_cpu_map(uvd_enc_bo->handle, (void **)&uvd_enc_bo->ptr);
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CU_ASSERT_EQUAL(r, 0);
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memset(uvd_enc_bo->ptr, 0, size);
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r = amdgpu_bo_cpu_unmap(uvd_enc_bo->handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void free_resource(struct amdgpu_uvd_enc_bo *uvd_enc_bo)
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{
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int r;
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r = amdgpu_bo_va_op(uvd_enc_bo->handle, 0, uvd_enc_bo->size,
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uvd_enc_bo->addr, 0, AMDGPU_VA_OP_UNMAP);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_va_range_free(uvd_enc_bo->va_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_free(uvd_enc_bo->handle);
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CU_ASSERT_EQUAL(r, 0);
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memset(uvd_enc_bo, 0, sizeof(*uvd_enc_bo));
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}
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static void amdgpu_cs_uvd_enc_create(void)
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{
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int len, r;
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if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
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return;
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enc.width = 160;
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enc.height = 128;
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num_resources = 0;
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alloc_resource(&enc.session, 128 * 1024, AMDGPU_GEM_DOMAIN_GTT);
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resources[num_resources++] = enc.session.handle;
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resources[num_resources++] = ib_handle;
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}
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static void check_result(struct amdgpu_uvd_enc *enc)
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{
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uint64_t sum;
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uint32_t s = 26382;
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uint32_t *ptr, size;
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int i, j, r;
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r = amdgpu_bo_cpu_map(enc->fb.handle, (void **)&enc->fb.ptr);
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CU_ASSERT_EQUAL(r, 0);
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ptr = (uint32_t *)enc->fb.ptr;
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size = ptr[6];
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r = amdgpu_bo_cpu_unmap(enc->fb.handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_cpu_map(enc->bs.handle, (void **)&enc->bs.ptr);
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CU_ASSERT_EQUAL(r, 0);
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for (j = 0, sum = 0; j < size; ++j)
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sum += enc->bs.ptr[j];
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CU_ASSERT_EQUAL(sum, s);
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r = amdgpu_bo_cpu_unmap(enc->bs.handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void amdgpu_cs_uvd_enc_session_init(void)
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{
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int len, r;
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if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
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return;
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len = 0;
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memcpy((ib_cpu + len), uve_session_info, sizeof(uve_session_info));
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len += sizeof(uve_session_info) / 4;
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ib_cpu[len++] = enc.session.addr >> 32;
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ib_cpu[len++] = enc.session.addr;
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memcpy((ib_cpu + len), uve_task_info, sizeof(uve_task_info));
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len += sizeof(uve_task_info) / 4;
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ib_cpu[len++] = 0x000000d8;
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ib_cpu[len++] = 0x00000000;
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ib_cpu[len++] = 0x00000000;
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memcpy((ib_cpu + len), uve_op_init, sizeof(uve_op_init));
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len += sizeof(uve_op_init) / 4;
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memcpy((ib_cpu + len), uve_session_init, sizeof(uve_session_init));
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len += sizeof(uve_session_init) / 4;
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memcpy((ib_cpu + len), uve_layer_ctrl, sizeof(uve_layer_ctrl));
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len += sizeof(uve_layer_ctrl) / 4;
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memcpy((ib_cpu + len), uve_slice_ctrl, sizeof(uve_slice_ctrl));
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len += sizeof(uve_slice_ctrl) / 4;
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memcpy((ib_cpu + len), uve_spec_misc, sizeof(uve_spec_misc));
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len += sizeof(uve_spec_misc) / 4;
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memcpy((ib_cpu + len), uve_rc_session_init, sizeof(uve_rc_session_init));
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len += sizeof(uve_rc_session_init) / 4;
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memcpy((ib_cpu + len), uve_deblocking_filter, sizeof(uve_deblocking_filter));
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len += sizeof(uve_deblocking_filter) / 4;
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memcpy((ib_cpu + len), uve_quality_params, sizeof(uve_quality_params));
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len += sizeof(uve_quality_params) / 4;
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memcpy((ib_cpu + len), uve_op_init_rc, sizeof(uve_op_init_rc));
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len += sizeof(uve_op_init_rc) / 4;
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memcpy((ib_cpu + len), uve_op_init_rc_vbv_level, sizeof(uve_op_init_rc_vbv_level));
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len += sizeof(uve_op_init_rc_vbv_level) / 4;
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r = submit(len, AMDGPU_HW_IP_UVD_ENC);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void amdgpu_cs_uvd_enc_encode(void)
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{
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int len, r, i;
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uint64_t luma_offset, chroma_offset;
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uint32_t vbuf_size, bs_size = 0x003f4800, cpb_size;
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unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
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vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
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cpb_size = vbuf_size * 10;
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if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
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return;
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num_resources = 0;
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alloc_resource(&enc.fb, 4096, AMDGPU_GEM_DOMAIN_VRAM);
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resources[num_resources++] = enc.fb.handle;
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alloc_resource(&enc.bs, bs_size, AMDGPU_GEM_DOMAIN_VRAM);
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resources[num_resources++] = enc.bs.handle;
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alloc_resource(&enc.vbuf, vbuf_size, AMDGPU_GEM_DOMAIN_VRAM);
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resources[num_resources++] = enc.vbuf.handle;
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alloc_resource(&enc.cpb, cpb_size, AMDGPU_GEM_DOMAIN_VRAM);
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resources[num_resources++] = enc.cpb.handle;
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resources[num_resources++] = ib_handle;
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r = amdgpu_bo_cpu_map(enc.vbuf.handle, (void **)&enc.vbuf.ptr);
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CU_ASSERT_EQUAL(r, 0);
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memset(enc.vbuf.ptr, 0, vbuf_size);
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for (i = 0; i < enc.height; ++i) {
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memcpy(enc.vbuf.ptr, (frame + i * enc.width), enc.width);
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enc.vbuf.ptr += ALIGN(enc.width, align);
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}
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for (i = 0; i < enc.height / 2; ++i) {
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memcpy(enc.vbuf.ptr, ((frame + enc.height * enc.width) + i * enc.width), enc.width);
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enc.vbuf.ptr += ALIGN(enc.width, align);
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}
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r = amdgpu_bo_cpu_unmap(enc.vbuf.handle);
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CU_ASSERT_EQUAL(r, 0);
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len = 0;
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memcpy((ib_cpu + len), uve_session_info, sizeof(uve_session_info));
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len += sizeof(uve_session_info) / 4;
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ib_cpu[len++] = enc.session.addr >> 32;
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ib_cpu[len++] = enc.session.addr;
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memcpy((ib_cpu + len), uve_task_info, sizeof(uve_task_info));
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len += sizeof(uve_task_info) / 4;
|
||||
ib_cpu[len++] = 0x000005e0;
|
||||
ib_cpu[len++] = 0x00000001;
|
||||
ib_cpu[len++] = 0x00000001;
|
||||
|
||||
memcpy((ib_cpu + len), uve_nalu_buffer_1, sizeof(uve_nalu_buffer_1));
|
||||
len += sizeof(uve_nalu_buffer_1) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_nalu_buffer_2, sizeof(uve_nalu_buffer_2));
|
||||
len += sizeof(uve_nalu_buffer_2) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_nalu_buffer_3, sizeof(uve_nalu_buffer_3));
|
||||
len += sizeof(uve_nalu_buffer_3) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_nalu_buffer_4, sizeof(uve_nalu_buffer_4));
|
||||
len += sizeof(uve_nalu_buffer_4) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_slice_header, sizeof(uve_slice_header));
|
||||
len += sizeof(uve_slice_header) / 4;
|
||||
|
||||
ib_cpu[len++] = 0x00000254;
|
||||
ib_cpu[len++] = 0x00000010;
|
||||
ib_cpu[len++] = enc.cpb.addr >> 32;
|
||||
ib_cpu[len++] = enc.cpb.addr;
|
||||
memcpy((ib_cpu + len), uve_ctx_buffer, sizeof(uve_ctx_buffer));
|
||||
len += sizeof(uve_ctx_buffer) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_bitstream_buffer, sizeof(uve_bitstream_buffer));
|
||||
len += sizeof(uve_bitstream_buffer) / 4;
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
ib_cpu[len++] = enc.bs.addr >> 32;
|
||||
ib_cpu[len++] = enc.bs.addr;
|
||||
ib_cpu[len++] = 0x003f4800;
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
|
||||
memcpy((ib_cpu + len), uve_feedback_buffer, sizeof(uve_feedback_buffer));
|
||||
len += sizeof(uve_feedback_buffer) / 4;
|
||||
ib_cpu[len++] = enc.fb.addr >> 32;
|
||||
ib_cpu[len++] = enc.fb.addr;
|
||||
ib_cpu[len++] = 0x00000010;
|
||||
ib_cpu[len++] = 0x00000028;
|
||||
|
||||
memcpy((ib_cpu + len), uve_feedback_buffer_additional, sizeof(uve_feedback_buffer_additional));
|
||||
len += sizeof(uve_feedback_buffer_additional) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_intra_refresh, sizeof(uve_intra_refresh));
|
||||
len += sizeof(uve_intra_refresh) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_layer_select, sizeof(uve_layer_select));
|
||||
len += sizeof(uve_layer_select) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_rc_layer_init, sizeof(uve_rc_layer_init));
|
||||
len += sizeof(uve_rc_layer_init) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_layer_select, sizeof(uve_layer_select));
|
||||
len += sizeof(uve_layer_select) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_rc_per_pic, sizeof(uve_rc_per_pic));
|
||||
len += sizeof(uve_rc_per_pic) / 4;
|
||||
|
||||
unsigned luma_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16);
|
||||
luma_offset = enc.vbuf.addr;
|
||||
chroma_offset = luma_offset + luma_size;
|
||||
ib_cpu[len++] = 0x00000054;
|
||||
ib_cpu[len++] = 0x0000000c;
|
||||
ib_cpu[len++] = 0x00000002;
|
||||
ib_cpu[len++] = 0x003f4800;
|
||||
ib_cpu[len++] = luma_offset >> 32;
|
||||
ib_cpu[len++] = luma_offset;
|
||||
ib_cpu[len++] = chroma_offset >> 32;
|
||||
ib_cpu[len++] = chroma_offset;
|
||||
memcpy((ib_cpu + len), uve_encode_param, sizeof(uve_encode_param));
|
||||
len += sizeof(uve_encode_param) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_op_speed_enc_mode, sizeof(uve_op_speed_enc_mode));
|
||||
len += sizeof(uve_op_speed_enc_mode) / 4;
|
||||
|
||||
memcpy((ib_cpu + len), uve_op_encode, sizeof(uve_op_encode));
|
||||
len += sizeof(uve_op_encode) / 4;
|
||||
|
||||
r = submit(len, AMDGPU_HW_IP_UVD_ENC);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
check_result(&enc);
|
||||
|
||||
free_resource(&enc.fb);
|
||||
free_resource(&enc.bs);
|
||||
free_resource(&enc.vbuf);
|
||||
free_resource(&enc.cpb);
|
||||
}
|
||||
|
||||
static void amdgpu_cs_uvd_enc_destroy(void)
|
||||
{
|
||||
struct amdgpu_uvd_enc_bo sw_ctx;
|
||||
int len, r;
|
||||
|
||||
if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
|
||||
return;
|
||||
|
||||
num_resources = 0;
|
||||
resources[num_resources++] = ib_handle;
|
||||
|
||||
len = 0;
|
||||
memcpy((ib_cpu + len), uve_session_info, sizeof(uve_session_info));
|
||||
len += sizeof(uve_session_info) / 4;
|
||||
ib_cpu[len++] = enc.session.addr >> 32;
|
||||
ib_cpu[len++] = enc.session.addr;
|
||||
|
||||
memcpy((ib_cpu + len), uve_task_info, sizeof(uve_task_info));
|
||||
len += sizeof(uve_task_info) / 4;
|
||||
ib_cpu[len++] = 0xffffffff;
|
||||
ib_cpu[len++] = 0x00000002;
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
|
||||
memcpy((ib_cpu + len), uve_op_close, sizeof(uve_op_close));
|
||||
len += sizeof(uve_op_close) / 4;
|
||||
|
||||
r = submit(len, AMDGPU_HW_IP_UVD_ENC);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
free_resource(&enc.session);
|
||||
}
|
||||
|
|
@ -0,0 +1,527 @@
|
|||
/*
|
||||
* Copyright 2017 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _uve_ib_h_
|
||||
#define _uve_ib_h_
|
||||
|
||||
static const uint32_t uve_session_info[] = {
|
||||
0x00000018,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x00010000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_task_info[] = {
|
||||
0x00000014,
|
||||
0x00000002,
|
||||
};
|
||||
|
||||
static const uint32_t uve_session_init[] = {
|
||||
0x00000020,
|
||||
0x00000003,
|
||||
0x000000c0,
|
||||
0x00000080,
|
||||
0x00000020,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_layer_ctrl[] = {
|
||||
0x00000010,
|
||||
0x00000004,
|
||||
0x00000001,
|
||||
0x00000001,
|
||||
};
|
||||
|
||||
static const uint32_t uve_layer_select[] = {
|
||||
0x0000000c,
|
||||
0x00000005,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_slice_ctrl[] = {
|
||||
0x00000014,
|
||||
0x00000006,
|
||||
0x00000000,
|
||||
0x00000006,
|
||||
0x00000006,
|
||||
};
|
||||
|
||||
static const uint32_t uve_spec_misc[] = {
|
||||
0x00000024,
|
||||
0x00000007,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
0x00000001,
|
||||
};
|
||||
|
||||
static const uint32_t uve_rc_session_init[] = {
|
||||
0x00000010,
|
||||
0x00000008,
|
||||
0x00000000,
|
||||
0x00000040,
|
||||
};
|
||||
|
||||
static const uint32_t uve_rc_layer_init[] = {
|
||||
0x00000028,
|
||||
0x00000009,
|
||||
0x001e8480,
|
||||
0x001e8480,
|
||||
0x0000001e,
|
||||
0x00000001,
|
||||
0x0001046a,
|
||||
0x0001046a,
|
||||
0x0001046a,
|
||||
0xaaaaaaaa,
|
||||
};
|
||||
|
||||
static const uint32_t uve_deblocking_filter[] = {
|
||||
0x00000020,
|
||||
0x0000000e,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_quality_params[] = {
|
||||
0x00000014,
|
||||
0x0000000d,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_feedback_buffer[] = {
|
||||
0x0000001c,
|
||||
0x00000012,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_feedback_buffer_additional[] = {
|
||||
0x00000108,
|
||||
0x00000014,
|
||||
0x00000001,
|
||||
0x00000010,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_nalu_buffer_1[] = {
|
||||
0x00000018,
|
||||
0x00000013,
|
||||
0x00000001,
|
||||
0x00000007,
|
||||
0x00000001,
|
||||
0x46011000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_nalu_buffer_2[] = {
|
||||
0x0000002c,
|
||||
0x00000013,
|
||||
0x00000002,
|
||||
0x0000001b,
|
||||
0x00000001,
|
||||
0x40010c01,
|
||||
0xffff0160,
|
||||
0x00000300,
|
||||
0xb0000003,
|
||||
0x00000300,
|
||||
0x962c0900,
|
||||
};
|
||||
|
||||
static const uint32_t uve_nalu_buffer_3[] = {
|
||||
0x00000034,
|
||||
0x00000013,
|
||||
0x00000003,
|
||||
0x00000023,
|
||||
0x00000001,
|
||||
0x42010101,
|
||||
0x60000003,
|
||||
0x00b00000,
|
||||
0x03000003,
|
||||
0x0096a018,
|
||||
0x2020708f,
|
||||
0xcb924295,
|
||||
0x12e08000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_nalu_buffer_4[] = {
|
||||
0x0000001c,
|
||||
0x00000013,
|
||||
0x00000004,
|
||||
0x0000000b,
|
||||
0x00000001,
|
||||
0x4401e0f1,
|
||||
0x80992000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_slice_header[] = {
|
||||
0x000000c8,
|
||||
0x0000000b,
|
||||
0x28010000,
|
||||
0x40000000,
|
||||
0x60000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000002,
|
||||
0x00000010,
|
||||
0x00000003,
|
||||
0x00000000,
|
||||
0x00000002,
|
||||
0x00000002,
|
||||
0x00000004,
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x00000002,
|
||||
0x00000003,
|
||||
0x00000005,
|
||||
0x00000000,
|
||||
0x00000002,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_encode_param[] = {
|
||||
0x000000a0,
|
||||
0x00000080,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0xffffffff,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_intra_refresh[] = {
|
||||
0x00000014,
|
||||
0x0000000f,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
};
|
||||
|
||||
static const uint32_t uve_ctx_buffer[] = {
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x000000a0,
|
||||
0x000000a0,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const uint32_t uve_bitstream_buffer[] = {
|
||||
0x0000001c,
|
||||
0x00000011,
|
||||
};
|
||||
|
||||
static const uint32_t uve_rc_per_pic[] = {
|
||||
0x00000024,
|
||||
0x0000000a,
|
||||
0x0000001a,
|
||||
0x00000000,
|
||||
0x00000033,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_init[] = {
|
||||
0x00000008,
|
||||
0x08000001,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_close[] = {
|
||||
0x00000008,
|
||||
0x08000002,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_encode[] = {
|
||||
0x00000008,
|
||||
0x08000003,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_init_rc[] = {
|
||||
0x00000008,
|
||||
0x08000004,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_init_rc_vbv_level[] = {
|
||||
0x00000008,
|
||||
0x08000005,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_speed_enc_mode[] = {
|
||||
0x00000008,
|
||||
0x08000006,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_balance_enc_mode[] = {
|
||||
0x00000008,
|
||||
0x08000007,
|
||||
};
|
||||
|
||||
static const uint32_t uve_op_quality_enc_mode[] = {
|
||||
0x00000008,
|
||||
0x08000008,
|
||||
};
|
||||
#endif /*_uve_ib_h*/
|
||||
Loading…
Reference in New Issue