The CPU cache must be flushed _before_ we start modifying the kernel map ptes,
otherwise data will be missing, which becomes apparent when the kernel evicts batch buffers which are likely to be written into in the evicted state, and then rebound to the AGP aperture. This means we cannot rely on the AGP module to flush the cache for us.main
parent
9321592149
commit
9ed4656799
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@ -610,7 +610,7 @@ static int drm_agp_bind_ttm(drm_ttm_backend_t *backend,
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DRM_DEBUG("drm_agp_bind_ttm\n");
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DRM_MASK_VAL(backend->flags, DRM_BE_FLAG_BOUND_CACHED,
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(cached) ? DRM_BE_FLAG_BOUND_CACHED : 0);
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mem->is_flushed = FALSE;
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mem->is_flushed = TRUE;
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mem->type = (cached) ? agp_priv->cached_type : agp_priv->uncached_type;
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ret = drm_agp_bind_memory(mem, offset);
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if (ret) {
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@ -28,6 +28,18 @@
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#include "drmP.h"
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static void drm_ttm_ipi_handler(void *null)
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{
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wbinvd();
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}
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static void drm_ttm_cache_flush(void)
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{
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if (on_each_cpu(drm_ttm_ipi_handler, NULL, 1, 1) != 0)
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DRM_ERROR("Timed out waiting for drm cache flush.\n");
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}
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/*
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* Use kmalloc if possible. Otherwise fall back to vmalloc.
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*/
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@ -99,6 +111,9 @@ static int drm_set_caching(drm_ttm_t * ttm, int noncached)
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if ((ttm->page_flags & DRM_TTM_PAGE_UNCACHED) == noncached)
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return 0;
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if (noncached)
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drm_ttm_cache_flush();
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for (i = 0; i < ttm->num_pages; ++i) {
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cur_page = ttm->pages + i;
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if (*cur_page) {
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Reference in New Issue