RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.main
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b535567ee9
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a07c82183a
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@ -204,12 +204,12 @@ static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv)
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RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp);
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RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp);
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/* 2D */
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/* 2D */
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tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT);
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tmp = RADEON_READ(R300_DSTCACHE_CTLSTAT);
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tmp |= RADEON_RB3D_DC_FLUSH_ALL;
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tmp |= RADEON_RB3D_DC_FLUSH_ALL;
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RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp);
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RADEON_WRITE(R300_DSTCACHE_CTLSTAT, tmp);
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for (i = 0; i < dev_priv->usec_timeout; i++) {
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for (i = 0; i < dev_priv->usec_timeout; i++) {
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if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT)
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if (!(RADEON_READ(R300_DSTCACHE_CTLSTAT)
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& RADEON_RB3D_DC_BUSY)) {
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& RADEON_RB3D_DC_BUSY)) {
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return 0;
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return 0;
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}
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}
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@ -673,11 +673,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
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#define RADEON_PP_TXFILTER_1 0x1c6c
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#define RADEON_PP_TXFILTER_1 0x1c6c
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#define RADEON_PP_TXFILTER_2 0x1c84
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#define RADEON_PP_TXFILTER_2 0x1c84
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#define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c
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#define R300_RB2D_DSTCACHE_CTLSTAT 0x342c /* use R300_DSTCACHE_CTLSTAT */
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# define RADEON_RB2D_DC_FLUSH (3 << 0)
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#define R300_DSTCACHE_CTLSTAT 0x1714
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# define RADEON_RB2D_DC_FREE (3 << 2)
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# define R300_RB2D_DC_FLUSH (3 << 0)
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# define RADEON_RB2D_DC_FLUSH_ALL 0xf
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# define R300_RB2D_DC_FREE (3 << 2)
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# define RADEON_RB2D_DC_BUSY (1 << 31)
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# define R300_RB2D_DC_FLUSH_ALL 0xf
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# define R300_RB2D_DC_BUSY (1 << 31)
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#define RADEON_RB3D_CNTL 0x1c3c
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#define RADEON_RB3D_CNTL 0x1c3c
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# define RADEON_ALPHA_BLEND_ENABLE (1 << 0)
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# define RADEON_ALPHA_BLEND_ENABLE (1 << 0)
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# define RADEON_PLANE_MASK_ENABLE (1 << 1)
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# define RADEON_PLANE_MASK_ENABLE (1 << 1)
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