Merge branch 'origin' into modesetting-101
Conflicts: linux-core/drmP.h shared-core/i915_dma.c shared-core/i915_drm.h shared-core/radeon_drv.hmain
commit
a20587e395
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@ -76,7 +76,11 @@ typedef struct drm_file drm_file_t;
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#if defined(__FreeBSD__)
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#if defined(__FreeBSD__)
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#include <sys/rman.h>
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#include <sys/rman.h>
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#include <sys/memrange.h>
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#include <sys/memrange.h>
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#if __FreeBSD_version >= 800004
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#include <dev/agp/agpvar.h>
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#else /* __FreeBSD_version >= 800004 */
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#include <pci/agpvar.h>
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#include <pci/agpvar.h>
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#endif /* __FreeBSD_version >= 800004 */
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#include <sys/agpio.h>
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#include <sys/agpio.h>
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#if __FreeBSD_version >= 500000
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#if __FreeBSD_version >= 500000
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#include <sys/mutex.h>
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#include <sys/mutex.h>
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@ -36,7 +36,11 @@
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#include "drmP.h"
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#include "drmP.h"
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#ifdef __FreeBSD__
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#ifdef __FreeBSD__
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#if __FreeBSD_version >= 800004
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#include <dev/agp/agpreg.h>
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#else /* __FreeBSD_version >= 800004 */
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#include <pci/agpreg.h>
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#include <pci/agpreg.h>
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#endif /* __FreeBSD_version >= 800004 */
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcireg.h>
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#endif
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#endif
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@ -35,7 +35,7 @@
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# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
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# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
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static __inline__ void insert_page_into_table(struct ati_pcigart_info *info, u32 page_base, u32 *pci_gart)
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static __inline__ void insert_page_into_table(struct drm_ati_pcigart_info *info, u32 page_base, u32 *pci_gart)
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{
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{
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switch(info->gart_reg_if) {
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switch(info->gart_reg_if) {
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case DRM_ATI_GART_IGP:
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case DRM_ATI_GART_IGP:
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@ -51,7 +51,7 @@ static __inline__ void insert_page_into_table(struct ati_pcigart_info *info, u32
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}
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}
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}
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}
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static __inline__ u32 get_page_base_from_table(struct ati_pcigart_info *info, u32 *pci_gart)
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static __inline__ u32 get_page_base_from_table(struct drm_ati_pcigart_info *info, u32 *pci_gart)
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{
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{
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u32 retval;
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u32 retval;
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switch(info->gart_reg_if) {
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switch(info->gart_reg_if) {
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@ -120,7 +120,7 @@ static void drm_ati_free_pcigart_table(void *address, int order)
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free_pages((unsigned long)address, order);
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free_pages((unsigned long)address, order);
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}
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}
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int drm_ati_pcigart_cleanup(struct drm_device *dev, struct ati_pcigart_info *gart_info)
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int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
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{
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{
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struct drm_sg_mem *entry = dev->sg;
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struct drm_sg_mem *entry = dev->sg;
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unsigned long pages;
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unsigned long pages;
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@ -171,7 +171,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct ati_pcigart_info *gar
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}
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}
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EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
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EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
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int drm_ati_pcigart_init(struct drm_device *dev, struct ati_pcigart_info *gart_info)
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int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
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{
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{
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struct drm_sg_mem *entry = dev->sg;
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struct drm_sg_mem *entry = dev->sg;
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void *address = NULL;
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void *address = NULL;
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@ -293,7 +293,7 @@ static int ati_pcigart_bind_ttm(struct drm_ttm_backend *backend,
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container_of(backend, ati_pcigart_ttm_backend_t, backend);
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container_of(backend, ati_pcigart_ttm_backend_t, backend);
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off_t j;
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off_t j;
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int i;
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int i;
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struct ati_pcigart_info *info = atipci_be->gart_info;
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struct drm_ati_pcigart_info *info = atipci_be->gart_info;
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u32 *pci_gart;
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u32 *pci_gart;
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u32 page_base;
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u32 page_base;
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unsigned long offset = bo_mem->mm_node->start;
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unsigned long offset = bo_mem->mm_node->start;
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@ -333,7 +333,7 @@ static int ati_pcigart_unbind_ttm(struct drm_ttm_backend *backend)
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{
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{
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ati_pcigart_ttm_backend_t *atipci_be =
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ati_pcigart_ttm_backend_t *atipci_be =
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container_of(backend, ati_pcigart_ttm_backend_t, backend);
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container_of(backend, ati_pcigart_ttm_backend_t, backend);
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struct ati_pcigart_info *info = atipci_be->gart_info;
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struct drm_ati_pcigart_info *info = atipci_be->gart_info;
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unsigned long offset = atipci_be->offset;
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unsigned long offset = atipci_be->offset;
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int i;
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int i;
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off_t j;
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off_t j;
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@ -392,7 +392,7 @@ static struct drm_ttm_backend_func ati_pcigart_ttm_backend =
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.destroy = ati_pcigart_destroy_ttm,
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.destroy = ati_pcigart_destroy_ttm,
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};
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};
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struct drm_ttm_backend *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev))
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struct drm_ttm_backend *ati_pcigart_init_ttm(struct drm_device *dev, struct drm_ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev))
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{
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{
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ati_pcigart_ttm_backend_t *atipci_be;
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ati_pcigart_ttm_backend_t *atipci_be;
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@ -85,6 +85,7 @@
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#include "drm_hashtab.h"
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#include "drm_hashtab.h"
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#include "drm_internal.h"
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#include "drm_internal.h"
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struct drm_device;
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struct drm_file;
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struct drm_file;
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/* If you want the memory alloc debug functionality, change define below */
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/* If you want the memory alloc debug functionality, change define below */
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@ -162,6 +163,12 @@ struct drm_file;
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#define DRM_OBJECT_HASH_ORDER 12
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#define DRM_OBJECT_HASH_ORDER 12
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#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)
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#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)
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#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16)
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#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16)
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/*
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* This should be small enough to allow the use of kmalloc for hash tables
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* instead of vmalloc.
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*/
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#define DRM_FILE_HASH_ORDER 8
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#define DRM_MM_INIT_MAX_PAGES 256
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#define DRM_MM_INIT_MAX_PAGES 256
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/*@}*/
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/*@}*/
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@ -278,9 +285,6 @@ do { \
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return -EFAULT; \
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return -EFAULT; \
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}
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}
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struct drm_device;
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struct drm_file;
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/**
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/**
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* Ioctl function type.
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* Ioctl function type.
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*
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*
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@ -396,12 +400,7 @@ struct drm_buf_entry {
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struct drm_freelist freelist;
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struct drm_freelist freelist;
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};
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};
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/*
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* This should be small enough to allow the use of kmalloc for hash tables
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* instead of vmalloc.
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*/
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#define DRM_FILE_HASH_ORDER 8
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enum drm_ref_type {
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enum drm_ref_type {
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_DRM_REF_USE = 0,
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_DRM_REF_USE = 0,
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_DRM_REF_TYPE1,
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_DRM_REF_TYPE1,
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@ -508,7 +507,7 @@ struct drm_agp_mem {
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/**
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/**
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* AGP data.
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* AGP data.
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*
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*
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* \sa drm_agp_init)() and drm_device::agp.
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* \sa drm_agp_init() and drm_device::agp.
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*/
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*/
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struct drm_agp_head {
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struct drm_agp_head {
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DRM_AGP_KERN agp_info; /**< AGP device information */
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DRM_AGP_KERN agp_info; /**< AGP device information */
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@ -599,7 +598,7 @@ struct drm_vbl_sig {
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#define DRM_ATI_GART_PCIE 2
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#define DRM_ATI_GART_PCIE 2
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#define DRM_ATI_GART_IGP 3
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#define DRM_ATI_GART_IGP 3
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struct ati_pcigart_info {
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struct drm_ati_pcigart_info {
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int gart_table_location;
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int gart_table_location;
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int gart_reg_if;
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int gart_reg_if;
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void *addr;
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void *addr;
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@ -664,7 +663,8 @@ struct drm_driver {
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struct drm_file *file_priv);
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struct drm_file *file_priv);
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unsigned long (*get_map_ofs) (struct drm_map *map);
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unsigned long (*get_map_ofs) (struct drm_map *map);
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unsigned long (*get_reg_ofs) (struct drm_device *dev);
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unsigned long (*get_reg_ofs) (struct drm_device *dev);
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void (*set_version) (struct drm_device * dev, struct drm_set_version * sv);
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void (*set_version) (struct drm_device *dev,
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struct drm_set_version *sv);
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/* FB routines, if present */
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/* FB routines, if present */
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int (*fb_probe)(struct drm_device *dev, struct drm_crtc *crtc);
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int (*fb_probe)(struct drm_device *dev, struct drm_crtc *crtc);
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@ -857,7 +857,7 @@ typedef struct ati_pcigart_ttm_backend {
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struct drm_ttm_backend backend;
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struct drm_ttm_backend backend;
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int populated;
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int populated;
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void (*gart_flush_fn)(struct drm_device *dev);
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void (*gart_flush_fn)(struct drm_device *dev);
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struct ati_pcigart_info *gart_info;
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struct drm_ati_pcigart_info *gart_info;
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unsigned long offset;
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unsigned long offset;
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struct page **pages;
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struct page **pages;
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int num_pages;
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int num_pages;
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@ -1179,9 +1179,9 @@ extern int drm_sg_free(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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struct drm_file *file_priv);
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/* ATI PCIGART support (ati_pcigart.h) */
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/* ATI PCIGART support (ati_pcigart.h) */
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extern int drm_ati_pcigart_init(struct drm_device *dev, struct ati_pcigart_info *gart_info);
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extern int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
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extern int drm_ati_pcigart_cleanup(struct drm_device *dev, struct ati_pcigart_info *gart_info);
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extern int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
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extern struct drm_ttm_backend *ati_pcigart_init_ttm(struct drm_device *dev, struct ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev));
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extern struct drm_ttm_backend *ati_pcigart_init_ttm(struct drm_device *dev, struct drm_ati_pcigart_info *info, void (*gart_flush_fn)(struct drm_device *dev));
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|
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extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
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extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
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size_t align, dma_addr_t maxaddr);
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size_t align, dma_addr_t maxaddr);
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|
|
|
@ -177,8 +177,13 @@ static int drm_addmap_core(struct drm_device *dev, unsigned int offset,
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MTRR_TYPE_WRCOMB, 1);
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MTRR_TYPE_WRCOMB, 1);
|
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}
|
}
|
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}
|
}
|
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if (map->type == _DRM_REGISTERS)
|
if (map->type == _DRM_REGISTERS) {
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map->handle = ioremap(map->offset, map->size);
|
map->handle = ioremap(map->offset, map->size);
|
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|
if (!map->handle) {
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|
drm_free(map, sizeof(*map), DRM_MEM_MAPS);
|
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|
return -ENOMEM;
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|
}
|
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|
}
|
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break;
|
break;
|
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case _DRM_SHM:
|
case _DRM_SHM:
|
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list = drm_find_matching_map(dev, map);
|
list = drm_find_matching_map(dev, map);
|
||||||
|
@ -387,9 +392,9 @@ int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map)
|
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}
|
}
|
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}
|
}
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|
|
||||||
if (!found) {
|
if (!found)
|
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return -EINVAL;
|
return -EINVAL;
|
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}
|
|
||||||
/* List has wrapped around to the head pointer, or it's empty and we
|
/* List has wrapped around to the head pointer, or it's empty and we
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* didn't find anything.
|
* didn't find anything.
|
||||||
*/
|
*/
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|
@ -495,7 +500,8 @@ int drm_rmmap_ioctl(struct drm_device *dev, void *data,
|
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*
|
*
|
||||||
* Frees any pages and buffers associated with the given entry.
|
* Frees any pages and buffers associated with the given entry.
|
||||||
*/
|
*/
|
||||||
static void drm_cleanup_buf_error(struct drm_device *dev, struct drm_buf_entry * entry)
|
static void drm_cleanup_buf_error(struct drm_device *dev,
|
||||||
|
struct drm_buf_entry *entry)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
@ -530,7 +536,7 @@ static void drm_cleanup_buf_error(struct drm_device *dev, struct drm_buf_entry *
|
||||||
|
|
||||||
#if __OS_HAS_AGP
|
#if __OS_HAS_AGP
|
||||||
/**
|
/**
|
||||||
* Add AGP buffers for DMA transfers
|
* Add AGP buffers for DMA transfers.
|
||||||
*
|
*
|
||||||
* \param dev struct drm_device to which the buffers are to be added.
|
* \param dev struct drm_device to which the buffers are to be added.
|
||||||
* \param request pointer to a struct drm_buf_desc describing the request.
|
* \param request pointer to a struct drm_buf_desc describing the request.
|
||||||
|
|
|
@ -266,7 +266,8 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
|
||||||
INIT_LIST_HEAD(&priv->fbs);
|
INIT_LIST_HEAD(&priv->fbs);
|
||||||
|
|
||||||
for (i = 0; i < _DRM_NO_REF_TYPES; ++i) {
|
for (i = 0; i < _DRM_NO_REF_TYPES; ++i) {
|
||||||
ret = drm_ht_create(&priv->refd_object_hash[i], DRM_FILE_HASH_ORDER);
|
ret = drm_ht_create(&priv->refd_object_hash[i],
|
||||||
|
DRM_FILE_HASH_ORDER);
|
||||||
if (ret)
|
if (ret)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -341,8 +342,9 @@ static void drm_object_release(struct file *filp)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Free leftover ref objects created by me. Note that we cannot use
|
* Free leftover ref objects created by me. Note that we cannot use
|
||||||
* list_for_each() here, as the struct_mutex may be temporarily released
|
* list_for_each() here, as the struct_mutex may be temporarily
|
||||||
* by the remove_() functions, and thus the lists may be altered.
|
* released by the remove_() functions, and thus the lists may be
|
||||||
|
* altered.
|
||||||
* Also, a drm_remove_ref_object() will not remove it
|
* Also, a drm_remove_ref_object() will not remove it
|
||||||
* from the list unless its refcount is 1.
|
* from the list unless its refcount is 1.
|
||||||
*/
|
*/
|
||||||
|
@ -354,10 +356,9 @@ static void drm_object_release(struct file *filp)
|
||||||
head = &priv->refd_objects;
|
head = &priv->refd_objects;
|
||||||
}
|
}
|
||||||
|
|
||||||
for(i = 0; i < _DRM_NO_REF_TYPES; ++i) {
|
for (i = 0; i < _DRM_NO_REF_TYPES; ++i)
|
||||||
drm_ht_remove(&priv->refd_object_hash[i]);
|
drm_ht_remove(&priv->refd_object_hash[i]);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Release file.
|
* Release file.
|
||||||
|
|
|
@ -131,7 +131,8 @@ int drm_ht_insert_item(struct drm_open_hash * ht, struct drm_hash_item * item)
|
||||||
* Just insert an item and return any "bits" bit key that hasn't been
|
* Just insert an item and return any "bits" bit key that hasn't been
|
||||||
* used before.
|
* used before.
|
||||||
*/
|
*/
|
||||||
int drm_ht_just_insert_please(struct drm_open_hash * ht, struct drm_hash_item * item,
|
int drm_ht_just_insert_please(struct drm_open_hash *ht,
|
||||||
|
struct drm_hash_item *item,
|
||||||
unsigned long seed, int bits, int shift,
|
unsigned long seed, int bits, int shift,
|
||||||
unsigned long add)
|
unsigned long add)
|
||||||
{
|
{
|
||||||
|
|
|
@ -45,8 +45,8 @@ static struct {
|
||||||
.lock = SPIN_LOCK_UNLOCKED
|
.lock = SPIN_LOCK_UNLOCKED
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline size_t drm_size_align(size_t size) {
|
static inline size_t drm_size_align(size_t size)
|
||||||
|
{
|
||||||
size_t tmpSize = 4;
|
size_t tmpSize = 4;
|
||||||
if (size > PAGE_SIZE)
|
if (size > PAGE_SIZE)
|
||||||
return PAGE_ALIGN(size);
|
return PAGE_ALIGN(size);
|
||||||
|
|
|
@ -42,7 +42,6 @@
|
||||||
* drm_memory.h.
|
* drm_memory.h.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Need the 4-argument version of vmap(). */
|
|
||||||
#if __OS_HAS_AGP
|
#if __OS_HAS_AGP
|
||||||
|
|
||||||
#include <linux/vmalloc.h>
|
#include <linux/vmalloc.h>
|
||||||
|
|
|
@ -113,7 +113,6 @@ int drm_regs_alloc(struct drm_reg_manager *manager,
|
||||||
*reg = entry;
|
*reg = entry;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(drm_regs_alloc);
|
EXPORT_SYMBOL(drm_regs_alloc);
|
||||||
|
|
||||||
void drm_regs_fence(struct drm_reg_manager *manager,
|
void drm_regs_fence(struct drm_reg_manager *manager,
|
||||||
|
@ -156,7 +155,6 @@ void drm_regs_fence(struct drm_reg_manager *manager,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(drm_regs_fence);
|
EXPORT_SYMBOL(drm_regs_fence);
|
||||||
|
|
||||||
void drm_regs_free(struct drm_reg_manager *manager)
|
void drm_regs_free(struct drm_reg_manager *manager)
|
||||||
|
@ -180,7 +178,6 @@ void drm_regs_free(struct drm_reg_manager *manager)
|
||||||
manager->reg_destroy(entry);
|
manager->reg_destroy(entry);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(drm_regs_free);
|
EXPORT_SYMBOL(drm_regs_free);
|
||||||
|
|
||||||
void drm_regs_add(struct drm_reg_manager *manager, struct drm_reg *reg)
|
void drm_regs_add(struct drm_reg_manager *manager, struct drm_reg *reg)
|
||||||
|
@ -188,7 +185,6 @@ void drm_regs_add(struct drm_reg_manager *manager, struct drm_reg *reg)
|
||||||
reg->fence = NULL;
|
reg->fence = NULL;
|
||||||
list_add_tail(®->head, &manager->free);
|
list_add_tail(®->head, &manager->free);
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(drm_regs_add);
|
EXPORT_SYMBOL(drm_regs_add);
|
||||||
|
|
||||||
void drm_regs_init(struct drm_reg_manager *manager,
|
void drm_regs_init(struct drm_reg_manager *manager,
|
||||||
|
@ -201,5 +197,4 @@ void drm_regs_init(struct drm_reg_manager *manager,
|
||||||
manager->reg_reusable = reg_reusable;
|
manager->reg_reusable = reg_reusable;
|
||||||
manager->reg_destroy = reg_destroy;
|
manager->reg_destroy = reg_destroy;
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL(drm_regs_init);
|
EXPORT_SYMBOL(drm_regs_init);
|
||||||
|
|
|
@ -264,7 +264,8 @@ int drm_sman_free_key(struct drm_sman *sman, unsigned int key)
|
||||||
if (drm_ht_find_item(&sman->user_hash_tab, key, &hash_item))
|
if (drm_ht_find_item(&sman->user_hash_tab, key, &hash_item))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
memblock_item = drm_hash_entry(hash_item, struct drm_memblock_item, user_hash);
|
memblock_item = drm_hash_entry(hash_item, struct drm_memblock_item,
|
||||||
|
user_hash);
|
||||||
drm_sman_free(memblock_item);
|
drm_sman_free(memblock_item);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -239,9 +239,6 @@ struct page *drm_ttm_get_page(struct drm_ttm *ttm, int index)
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(drm_ttm_get_page);
|
EXPORT_SYMBOL(drm_ttm_get_page);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
int drm_ttm_set_user(struct drm_ttm *ttm,
|
int drm_ttm_set_user(struct drm_ttm *ttm,
|
||||||
struct task_struct *tsk,
|
struct task_struct *tsk,
|
||||||
int write,
|
int write,
|
||||||
|
@ -278,8 +275,6 @@ int drm_ttm_set_user(struct drm_ttm *ttm,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
int drm_ttm_populate(struct drm_ttm *ttm)
|
int drm_ttm_populate(struct drm_ttm *ttm)
|
||||||
{
|
{
|
||||||
struct page *page;
|
struct page *page;
|
||||||
|
|
|
@ -143,6 +143,7 @@ nouveau_bo_evict_mask(struct drm_buffer_object *bo)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
|
/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
|
||||||
* DRM_BO_MEM_{VRAM,PRIV0,TT} directly.
|
* DRM_BO_MEM_{VRAM,PRIV0,TT} directly.
|
||||||
*/
|
*/
|
||||||
|
@ -195,6 +196,46 @@ nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
|
||||||
DRM_FENCE_TYPE_EXE, 0, new_mem);
|
DRM_FENCE_TYPE_EXE, 0, new_mem);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Flip pages into the GART and move if we can. */
|
||||||
|
static int
|
||||||
|
nouveau_bo_move_gart(struct drm_buffer_object *bo, int evict, int no_wait,
|
||||||
|
struct drm_bo_mem_reg *new_mem)
|
||||||
|
{
|
||||||
|
struct drm_device *dev = bo->dev;
|
||||||
|
struct drm_bo_mem_reg tmp_mem;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
tmp_mem = *new_mem;
|
||||||
|
tmp_mem.mm_node = NULL;
|
||||||
|
tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
|
||||||
|
DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
|
||||||
|
|
||||||
|
ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
|
||||||
|
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = drm_bind_ttm(bo->ttm, &tmp_mem);
|
||||||
|
if (ret)
|
||||||
|
goto out_cleanup;
|
||||||
|
|
||||||
|
ret = nouveau_bo_move_m2mf(bo, 1, no_wait, &tmp_mem);
|
||||||
|
if (ret)
|
||||||
|
goto out_cleanup;
|
||||||
|
|
||||||
|
ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
|
||||||
|
|
||||||
|
out_cleanup:
|
||||||
|
if (tmp_mem.mm_node) {
|
||||||
|
mutex_lock(&dev->struct_mutex);
|
||||||
|
if (tmp_mem.mm_node != bo->pinned_node)
|
||||||
|
drm_mm_put_block(tmp_mem.mm_node);
|
||||||
|
tmp_mem.mm_node = NULL;
|
||||||
|
mutex_unlock(&dev->struct_mutex);
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
|
nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
|
||||||
struct drm_bo_mem_reg *new_mem)
|
struct drm_bo_mem_reg *new_mem)
|
||||||
|
@ -205,14 +246,14 @@ nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
|
||||||
if (old_mem->mem_type == DRM_BO_MEM_LOCAL)
|
if (old_mem->mem_type == DRM_BO_MEM_LOCAL)
|
||||||
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
||||||
#if 0
|
#if 0
|
||||||
if (!nouveau_bo_move_flipd(bo, evict, no_wait, new_mem))
|
if (!nouveau_bo_move_to_gart(bo, evict, no_wait, new_mem))
|
||||||
#endif
|
#endif
|
||||||
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
|
if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
|
||||||
#if 0
|
#if 0
|
||||||
if (nouveau_bo_move_flips(bo, evict, no_wait, new_mem))
|
if (nouveau_bo_move_to_gart(bo, evict, no_wait, new_mem))
|
||||||
#endif
|
#endif
|
||||||
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
||||||
}
|
}
|
||||||
|
|
|
@ -74,7 +74,7 @@ static void sis_sman_mm_destroy(void *private)
|
||||||
;
|
;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned long sis_sman_mm_offset(void *private, void *ref)
|
static unsigned long sis_sman_mm_offset(void *private, void *ref)
|
||||||
{
|
{
|
||||||
return ~((unsigned long)ref);
|
return ~((unsigned long)ref);
|
||||||
}
|
}
|
||||||
|
@ -231,8 +231,7 @@ static drm_local_map_t *sis_reg_init(struct drm_device *dev)
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int sis_idle(struct drm_device *dev)
|
||||||
sis_idle(struct drm_device *dev)
|
|
||||||
{
|
{
|
||||||
drm_sis_private_t *dev_priv = dev->dev_private;
|
drm_sis_private_t *dev_priv = dev->dev_private;
|
||||||
uint32_t idle_reg;
|
uint32_t idle_reg;
|
||||||
|
|
|
@ -239,8 +239,10 @@ via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
memset(vsg->pages, 0, sizeof(struct page *) * vsg->num_pages);
|
memset(vsg->pages, 0, sizeof(struct page *) * vsg->num_pages);
|
||||||
down_read(¤t->mm->mmap_sem);
|
down_read(¤t->mm->mmap_sem);
|
||||||
ret = get_user_pages(current, current->mm, (unsigned long) xfer->mem_addr,
|
ret = get_user_pages(current, current->mm,
|
||||||
vsg->num_pages, (vsg->direction == DMA_FROM_DEVICE),
|
(unsigned long)xfer->mem_addr,
|
||||||
|
vsg->num_pages,
|
||||||
|
(vsg->direction == DMA_FROM_DEVICE),
|
||||||
0, vsg->pages, NULL);
|
0, vsg->pages, NULL);
|
||||||
|
|
||||||
up_read(¤t->mm->mmap_sem);
|
up_read(¤t->mm->mmap_sem);
|
||||||
|
|
|
@ -64,7 +64,7 @@ struct xgi_info {
|
||||||
struct drm_map *fb_map;
|
struct drm_map *fb_map;
|
||||||
|
|
||||||
/* look up table parameters */
|
/* look up table parameters */
|
||||||
struct ati_pcigart_info gart_info;
|
struct drm_ati_pcigart_info gart_info;
|
||||||
unsigned int lutPageSize;
|
unsigned int lutPageSize;
|
||||||
|
|
||||||
struct drm_sman sman;
|
struct drm_sman sman;
|
||||||
|
|
|
@ -171,7 +171,9 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
|
||||||
I915_WRITE(0x02080, dev_priv->dma_status_page);
|
I915_WRITE(0x02080, dev_priv->dma_status_page);
|
||||||
}
|
}
|
||||||
DRM_DEBUG("Enabled hardware status page\n");
|
DRM_DEBUG("Enabled hardware status page\n");
|
||||||
|
#ifdef I915_HAVE_BUFFER
|
||||||
mutex_init(&dev_priv->cmdbuf_mutex);
|
mutex_init(&dev_priv->cmdbuf_mutex);
|
||||||
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1161,6 +1163,7 @@ static int i915_setparam(struct drm_device *dev, void *data,
|
||||||
|
|
||||||
switch (param->param) {
|
switch (param->param) {
|
||||||
case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
|
case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
|
||||||
|
if (!IS_I965G(dev))
|
||||||
dev_priv->use_mi_batchbuffer_start = param->value;
|
dev_priv->use_mi_batchbuffer_start = param->value;
|
||||||
break;
|
break;
|
||||||
case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
|
case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
|
||||||
|
|
|
@ -359,6 +359,7 @@ struct drm_i915_execbuffer {
|
||||||
uint64_t ops_list;
|
uint64_t ops_list;
|
||||||
uint32_t num_buffers;
|
uint32_t num_buffers;
|
||||||
struct drm_i915_batchbuffer batch;
|
struct drm_i915_batchbuffer batch;
|
||||||
|
drm_context_t context; /* for lockless use in the future */
|
||||||
struct drm_fence_arg fence_arg;
|
struct drm_fence_arg fence_arg;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -326,10 +326,12 @@ extern int i915_move(struct drm_buffer_object *bo, int evict,
|
||||||
void i915_flush_ttm(struct drm_ttm *ttm);
|
void i915_flush_ttm(struct drm_ttm *ttm);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef __linux__
|
||||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
|
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
|
||||||
extern void intel_init_chipset_flush_compat(struct drm_device *dev);
|
extern void intel_init_chipset_flush_compat(struct drm_device *dev);
|
||||||
extern void intel_fini_chipset_flush_compat(struct drm_device *dev);
|
extern void intel_fini_chipset_flush_compat(struct drm_device *dev);
|
||||||
#endif
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/* modesetting */
|
/* modesetting */
|
||||||
|
@ -1263,16 +1265,16 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
|
||||||
#define PALETTE_A 0x0a000
|
#define PALETTE_A 0x0a000
|
||||||
#define PALETTE_B 0x0a800
|
#define PALETTE_B 0x0a800
|
||||||
|
|
||||||
#define IS_I830(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82830_CGC)
|
#define IS_I830(dev) ((dev)->pci_device == 0x3577)
|
||||||
#define IS_845G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82845G_IG)
|
#define IS_845G(dev) ((dev)->pci_device == 0x2562)
|
||||||
#define IS_I85X(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82855GM_IG)
|
#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
|
||||||
#define IS_I855(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82855GM_IG)
|
#define IS_I855(dev) ((dev)->pci_device == 0x3582)
|
||||||
#define IS_I865G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82865_IG)
|
#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
|
||||||
|
|
||||||
#define IS_I915G(dev) (dev->pci_device == PCI_DEVICE_ID_INTEL_82915G_IG)/* || dev->pci_device == PCI_DEVICE_ID_INTELPCI_CHIP_E7221_G)*/
|
#define IS_I915G(dev) (dev->pci_device == 0x2582)/* || dev->pci_device == PCI_DEVICE_ID_INTELPCI_CHIP_E7221_G)*/
|
||||||
#define IS_I915GM(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82915GM_IG)
|
#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
|
||||||
#define IS_I945G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82945G_IG)
|
#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
|
||||||
#define IS_I945GM(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82945GM_IG)
|
#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2)
|
||||||
|
|
||||||
#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
|
#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
|
||||||
(dev)->pci_device == 0x2982 || \
|
(dev)->pci_device == 0x2982 || \
|
||||||
|
|
|
@ -436,7 +436,8 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags)
|
||||||
static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
|
static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
|
||||||
drm_mga_dma_bootstrap_t * dma_bs)
|
drm_mga_dma_bootstrap_t * dma_bs)
|
||||||
{
|
{
|
||||||
drm_mga_private_t * const dev_priv = (drm_mga_private_t *) dev->dev_private;
|
drm_mga_private_t *const dev_priv =
|
||||||
|
(drm_mga_private_t *)dev->dev_private;
|
||||||
unsigned int warp_size = mga_warp_microcode_size(dev_priv);
|
unsigned int warp_size = mga_warp_microcode_size(dev_priv);
|
||||||
int err;
|
int err;
|
||||||
unsigned offset;
|
unsigned offset;
|
||||||
|
@ -481,7 +482,6 @@ static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* Allocate and bind AGP memory. */
|
/* Allocate and bind AGP memory. */
|
||||||
agp_req.size = agp_size;
|
agp_req.size = agp_size;
|
||||||
agp_req.type = 0;
|
agp_req.type = 0;
|
||||||
|
@ -606,7 +606,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
|
||||||
static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
|
static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
|
||||||
drm_mga_dma_bootstrap_t * dma_bs)
|
drm_mga_dma_bootstrap_t * dma_bs)
|
||||||
{
|
{
|
||||||
drm_mga_private_t * const dev_priv = (drm_mga_private_t *) dev->dev_private;
|
drm_mga_private_t *const dev_priv =
|
||||||
|
(drm_mga_private_t *) dev->dev_private;
|
||||||
unsigned int warp_size = mga_warp_microcode_size(dev_priv);
|
unsigned int warp_size = mga_warp_microcode_size(dev_priv);
|
||||||
unsigned int primary_size;
|
unsigned int primary_size;
|
||||||
unsigned int bin_count;
|
unsigned int bin_count;
|
||||||
|
@ -639,9 +640,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
|
||||||
* alignment of the primary or secondary DMA buffers.
|
* alignment of the primary or secondary DMA buffers.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
for ( primary_size = dma_bs->primary_size
|
for (primary_size = dma_bs->primary_size; primary_size != 0;
|
||||||
; primary_size != 0
|
primary_size >>= 1 ) {
|
||||||
; primary_size >>= 1 ) {
|
|
||||||
/* The proper alignment for this mapping is 0x04 */
|
/* The proper alignment for this mapping is 0x04 */
|
||||||
err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT,
|
err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT,
|
||||||
_DRM_READ_ONLY, &dev_priv->primary);
|
_DRM_READ_ONLY, &dev_priv->primary);
|
||||||
|
@ -661,9 +661,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
|
||||||
dma_bs->primary_size = dev_priv->primary->size;
|
dma_bs->primary_size = dev_priv->primary->size;
|
||||||
}
|
}
|
||||||
|
|
||||||
for ( bin_count = dma_bs->secondary_bin_count
|
for (bin_count = dma_bs->secondary_bin_count; bin_count > 0;
|
||||||
; bin_count > 0
|
bin_count-- ) {
|
||||||
; bin_count-- ) {
|
|
||||||
(void)memset(&req, 0, sizeof(req));
|
(void)memset(&req, 0, sizeof(req));
|
||||||
req.count = bin_count;
|
req.count = bin_count;
|
||||||
req.size = dma_bs->secondary_bin_size;
|
req.size = dma_bs->secondary_bin_size;
|
||||||
|
@ -855,7 +854,8 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
dev->agp_buffer_token = init->buffers_offset;
|
dev->agp_buffer_token = init->buffers_offset;
|
||||||
dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
|
dev->agp_buffer_map =
|
||||||
|
drm_core_findmap(dev, init->buffers_offset);
|
||||||
if (!dev->agp_buffer_map) {
|
if (!dev->agp_buffer_map) {
|
||||||
DRM_ERROR("failed to find dma buffer region!\n");
|
DRM_ERROR("failed to find dma buffer region!\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
@ -898,10 +898,6 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
|
||||||
/* Init the primary DMA registers.
|
/* Init the primary DMA registers.
|
||||||
*/
|
*/
|
||||||
MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL);
|
MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL);
|
||||||
#if 0
|
|
||||||
MGA_WRITE(MGA_PRIMPTR, virt_to_bus((void *)dev_priv->prim.status) | MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */
|
|
||||||
MGA_PRIMPTREN1); /* DWGSYNC */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
dev_priv->prim.start = (u8 *) dev_priv->primary->handle;
|
dev_priv->prim.start = (u8 *) dev_priv->primary->handle;
|
||||||
dev_priv->prim.end = ((u8 *) dev_priv->primary->handle
|
dev_priv->prim.end = ((u8 *) dev_priv->primary->handle
|
||||||
|
@ -993,7 +989,8 @@ static int mga_do_cleanup_dma(struct drm_device * dev, int full_cleanup)
|
||||||
|
|
||||||
memset(&dev_priv->prim, 0, sizeof(dev_priv->prim));
|
memset(&dev_priv->prim, 0, sizeof(dev_priv->prim));
|
||||||
dev_priv->warp_pipe = 0;
|
dev_priv->warp_pipe = 0;
|
||||||
memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
|
memset(dev_priv->warp_pipe_phys, 0,
|
||||||
|
sizeof(dev_priv->warp_pipe_phys));
|
||||||
|
|
||||||
if (dev_priv->head != NULL) {
|
if (dev_priv->head != NULL) {
|
||||||
mga_freelist_cleanup(dev);
|
mga_freelist_cleanup(dev);
|
||||||
|
|
|
@ -74,9 +74,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
|
||||||
handled = 1;
|
handled = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ( handled ) {
|
if (handled)
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
|
||||||
return IRQ_NONE;
|
return IRQ_NONE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -62,8 +62,7 @@ static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
|
||||||
}
|
}
|
||||||
DMA_BLOCK(MGA_DMAPAD, 0x00000000,
|
DMA_BLOCK(MGA_DMAPAD, 0x00000000,
|
||||||
MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,
|
MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,
|
||||||
MGA_YTOP, box->y1 * pitch,
|
MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch);
|
||||||
MGA_YBOT, (box->y2 - 1) * pitch);
|
|
||||||
|
|
||||||
ADVANCE_DMA();
|
ADVANCE_DMA();
|
||||||
}
|
}
|
||||||
|
@ -78,18 +77,15 @@ static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
|
||||||
|
|
||||||
DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
|
DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
|
||||||
MGA_MACCESS, ctx->maccess,
|
MGA_MACCESS, ctx->maccess,
|
||||||
MGA_PLNWT, ctx->plnwt,
|
MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);
|
||||||
MGA_DWGCTL, ctx->dwgctl);
|
|
||||||
|
|
||||||
DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
|
DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
|
||||||
MGA_FOGCOL, ctx->fogcolor,
|
MGA_FOGCOL, ctx->fogcolor,
|
||||||
MGA_WFLAG, ctx->wflag,
|
MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);
|
||||||
MGA_ZORG, dev_priv->depth_offset);
|
|
||||||
|
|
||||||
DMA_BLOCK(MGA_FCOL, ctx->fcol,
|
DMA_BLOCK(MGA_FCOL, ctx->fcol,
|
||||||
MGA_DMAPAD, 0x00000000,
|
MGA_DMAPAD, 0x00000000,
|
||||||
MGA_DMAPAD, 0x00000000,
|
MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
|
||||||
MGA_DMAPAD, 0x00000000);
|
|
||||||
|
|
||||||
ADVANCE_DMA();
|
ADVANCE_DMA();
|
||||||
}
|
}
|
||||||
|
|
|
@ -307,20 +307,29 @@ nouveau_card_init(struct drm_device *dev)
|
||||||
DRM_MEMORYBARRIER();
|
DRM_MEMORYBARRIER();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(__powerpc__)
|
#if defined(__linux__) && defined(__powerpc__)
|
||||||
/* if we have an OF card, copy vbios to RAMIN */
|
/* if we have an OF card, copy vbios to RAMIN */
|
||||||
dn = pci_device_to_OF_node(dev->pdev);
|
dn = pci_device_to_OF_node(dev->pdev);
|
||||||
if (dn)
|
if (dn)
|
||||||
{
|
{
|
||||||
int size;
|
int size;
|
||||||
|
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
|
||||||
const uint32_t *bios = of_get_property(dn, "NVDA,BMP", &size);
|
const uint32_t *bios = of_get_property(dn, "NVDA,BMP", &size);
|
||||||
|
#else
|
||||||
|
const uint32_t *bios = get_property(dn, "NVDA,BMP", &size);
|
||||||
|
#endif
|
||||||
if (bios)
|
if (bios)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
for(i=0;i<size;i+=4)
|
for(i=0;i<size;i+=4)
|
||||||
NV_WI32(i, bios[i/4]);
|
NV_WI32(i, bios[i/4]);
|
||||||
|
DRM_INFO("OF bios successfully copied (%d bytes)\n",size);
|
||||||
}
|
}
|
||||||
|
else
|
||||||
|
DRM_INFO("Unable to get the OF bios\n");
|
||||||
}
|
}
|
||||||
|
else
|
||||||
|
DRM_INFO("Unable to get the OF node\n");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Determine exact chipset we're running on */
|
/* Determine exact chipset we're running on */
|
||||||
|
|
|
@ -29,7 +29,7 @@
|
||||||
#define NV2A_GRCTX_SIZE (3500*4)
|
#define NV2A_GRCTX_SIZE (3500*4)
|
||||||
|
|
||||||
#define NV30_31_GRCTX_SIZE (24392)
|
#define NV30_31_GRCTX_SIZE (24392)
|
||||||
#define NV34_GRCTX_SIZE (22000)
|
#define NV34_GRCTX_SIZE (18140)
|
||||||
#define NV35_36_GRCTX_SIZE (22396)
|
#define NV35_36_GRCTX_SIZE (22396)
|
||||||
|
|
||||||
static void nv20_graph_context_init(struct drm_device *dev,
|
static void nv20_graph_context_init(struct drm_device *dev,
|
||||||
|
|
|
@ -118,7 +118,7 @@ typedef struct drm_r128_private {
|
||||||
drm_local_map_t *cce_ring;
|
drm_local_map_t *cce_ring;
|
||||||
drm_local_map_t *ring_rptr;
|
drm_local_map_t *ring_rptr;
|
||||||
drm_local_map_t *agp_textures;
|
drm_local_map_t *agp_textures;
|
||||||
struct ati_pcigart_info gart_info;
|
struct drm_ati_pcigart_info gart_info;
|
||||||
} drm_r128_private_t;
|
} drm_r128_private_t;
|
||||||
|
|
||||||
typedef struct drm_r128_buf_priv {
|
typedef struct drm_r128_buf_priv {
|
||||||
|
|
|
@ -816,6 +816,21 @@ static const u32 R300_cp_microcode[][2] = {
|
||||||
{ 0000000000, 0000000000 },
|
{ 0000000000, 0000000000 },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
|
||||||
|
{
|
||||||
|
return RADEON_READ(RADEON_MC_FB_LOCATION);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
|
||||||
|
{
|
||||||
|
RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
|
||||||
|
{
|
||||||
|
RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
|
||||||
|
}
|
||||||
|
|
||||||
static int RADEON_READ_PLL(struct drm_device * dev, int addr)
|
static int RADEON_READ_PLL(struct drm_device * dev, int addr)
|
||||||
{
|
{
|
||||||
drm_radeon_private_t *dev_priv = dev->dev_private;
|
drm_radeon_private_t *dev_priv = dev->dev_private;
|
||||||
|
@ -1134,14 +1149,14 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
|
||||||
* always appended to the fb which is not necessarily the case
|
* always appended to the fb which is not necessarily the case
|
||||||
*/
|
*/
|
||||||
if (!dev_priv->new_memmap)
|
if (!dev_priv->new_memmap)
|
||||||
RADEON_WRITE(RADEON_MC_FB_LOCATION,
|
radeon_write_fb_location(dev_priv,
|
||||||
((dev_priv->gart_vm_start - 1) & 0xffff0000)
|
((dev_priv->gart_vm_start - 1) & 0xffff0000)
|
||||||
| (dev_priv->fb_location >> 16));
|
| (dev_priv->fb_location >> 16));
|
||||||
|
|
||||||
#if __OS_HAS_AGP
|
#if __OS_HAS_AGP
|
||||||
if (dev_priv->flags & RADEON_IS_AGP) {
|
if (dev_priv->flags & RADEON_IS_AGP) {
|
||||||
RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
|
RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
|
||||||
RADEON_WRITE(RADEON_MC_AGP_LOCATION,
|
radeon_write_agp_location(dev_priv,
|
||||||
(((dev_priv->gart_vm_start - 1 +
|
(((dev_priv->gart_vm_start - 1 +
|
||||||
dev_priv->gart_size) & 0xffff0000) |
|
dev_priv->gart_size) & 0xffff0000) |
|
||||||
(dev_priv->gart_vm_start >> 16)));
|
(dev_priv->gart_vm_start >> 16)));
|
||||||
|
@ -1305,7 +1320,7 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
|
||||||
|
|
||||||
RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start);
|
RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start);
|
||||||
dev_priv->gart_size = 32*1024*1024;
|
dev_priv->gart_size = 32*1024*1024;
|
||||||
RADEON_WRITE(RADEON_MC_AGP_LOCATION,
|
radeon_write_agp_location(dev_priv,
|
||||||
(((dev_priv->gart_vm_start - 1 +
|
(((dev_priv->gart_vm_start - 1 +
|
||||||
dev_priv->gart_size) & 0xffff0000) |
|
dev_priv->gart_size) & 0xffff0000) |
|
||||||
(dev_priv->gart_vm_start >> 16)));
|
(dev_priv->gart_vm_start >> 16)));
|
||||||
|
@ -1339,7 +1354,7 @@ static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
|
||||||
dev_priv->gart_vm_start +
|
dev_priv->gart_vm_start +
|
||||||
dev_priv->gart_size - 1);
|
dev_priv->gart_size - 1);
|
||||||
|
|
||||||
RADEON_WRITE(RADEON_MC_AGP_LOCATION, 0xffffffc0); /* ?? */
|
radeon_write_agp_location(dev_priv, 0xffffffc0); /* ?? */
|
||||||
|
|
||||||
RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL,
|
RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL,
|
||||||
RADEON_PCIE_TX_GART_EN);
|
RADEON_PCIE_TX_GART_EN);
|
||||||
|
@ -1382,7 +1397,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
|
||||||
|
|
||||||
/* Turn off AGP aperture -- is this required for PCI GART?
|
/* Turn off AGP aperture -- is this required for PCI GART?
|
||||||
*/
|
*/
|
||||||
RADEON_WRITE(RADEON_MC_AGP_LOCATION, 0xffffffc0); /* ?? */
|
radeon_write_agp_location(dev_priv, 0xffffffc0);
|
||||||
RADEON_WRITE(RADEON_AGP_COMMAND, 0); /* clear AGP_COMMAND */
|
RADEON_WRITE(RADEON_AGP_COMMAND, 0); /* clear AGP_COMMAND */
|
||||||
} else {
|
} else {
|
||||||
RADEON_WRITE(RADEON_AIC_CNTL,
|
RADEON_WRITE(RADEON_AIC_CNTL,
|
||||||
|
@ -1612,10 +1627,9 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
|
||||||
dev->agp_buffer_map->handle);
|
dev->agp_buffer_map->handle);
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION)
|
dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 16;
|
||||||
& 0xffff) << 16;
|
|
||||||
dev_priv->fb_size =
|
dev_priv->fb_size =
|
||||||
((RADEON_READ(RADEON_MC_FB_LOCATION) & 0xffff0000u) + 0x10000)
|
((radeon_read_fb_location(dev_priv) & 0xffff0000u) + 0x10000)
|
||||||
- dev_priv->fb_location;
|
- dev_priv->fb_location;
|
||||||
|
|
||||||
dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
|
dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
|
||||||
|
|
|
@ -665,6 +665,7 @@ typedef struct drm_radeon_indirect {
|
||||||
#define RADEON_PARAM_SCRATCH_OFFSET 11
|
#define RADEON_PARAM_SCRATCH_OFFSET 11
|
||||||
#define RADEON_PARAM_CARD_TYPE 12
|
#define RADEON_PARAM_CARD_TYPE 12
|
||||||
#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */
|
#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */
|
||||||
|
#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
|
||||||
|
|
||||||
typedef struct drm_radeon_getparam {
|
typedef struct drm_radeon_getparam {
|
||||||
int param;
|
int param;
|
||||||
|
|
|
@ -301,7 +301,7 @@ typedef struct drm_radeon_private {
|
||||||
|
|
||||||
unsigned long pcigart_offset;
|
unsigned long pcigart_offset;
|
||||||
unsigned int pcigart_offset_set;
|
unsigned int pcigart_offset_set;
|
||||||
struct ati_pcigart_info gart_info;
|
struct drm_ati_pcigart_info gart_info;
|
||||||
|
|
||||||
u32 scratch_ages[5];
|
u32 scratch_ages[5];
|
||||||
|
|
||||||
|
@ -352,6 +352,7 @@ extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_fi
|
||||||
extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
|
extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
|
||||||
extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
|
extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
|
||||||
extern void radeon_gart_flush(struct drm_device *dev);
|
extern void radeon_gart_flush(struct drm_device *dev);
|
||||||
|
extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
|
||||||
|
|
||||||
extern void radeon_freelist_reset(struct drm_device * dev);
|
extern void radeon_freelist_reset(struct drm_device * dev);
|
||||||
extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
|
extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
|
||||||
|
|
|
@ -147,8 +147,7 @@ static int radeon_wait_irq(struct drm_device * dev, int swi_nr)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int radeon_driver_vblank_do_wait(struct drm_device * dev,
|
static int radeon_driver_vblank_do_wait(struct drm_device * dev,
|
||||||
unsigned int *sequence,
|
unsigned int *sequence, int crtc)
|
||||||
int crtc)
|
|
||||||
{
|
{
|
||||||
drm_radeon_private_t *dev_priv =
|
drm_radeon_private_t *dev_priv =
|
||||||
(drm_radeon_private_t *) dev->dev_private;
|
(drm_radeon_private_t *) dev->dev_private;
|
||||||
|
|
|
@ -3081,6 +3081,9 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
|
||||||
case RADEON_PARAM_VBLANK_CRTC:
|
case RADEON_PARAM_VBLANK_CRTC:
|
||||||
value = radeon_vblank_crtc_get(dev);
|
value = radeon_vblank_crtc_get(dev);
|
||||||
break;
|
break;
|
||||||
|
case RADEON_PARAM_FB_LOCATION:
|
||||||
|
value = radeon_read_fb_location(dev_priv);
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
DRM_DEBUG( "Invalid parameter %d\n", param->param );
|
DRM_DEBUG( "Invalid parameter %d\n", param->param );
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
|
@ -1065,8 +1065,6 @@ void savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
|
||||||
if (!dma->buflist)
|
if (!dma->buflist)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
/*i830_flush_queue(dev);*/
|
|
||||||
|
|
||||||
for (i = 0; i < dma->buf_count; i++) {
|
for (i = 0; i < dma->buf_count; i++) {
|
||||||
struct drm_buf *buf = dma->buflist[i];
|
struct drm_buf *buf = dma->buflist[i];
|
||||||
drm_savage_buf_priv_t *buf_priv = buf->dev_private;
|
drm_savage_buf_priv_t *buf_priv = buf->dev_private;
|
||||||
|
|
|
@ -84,8 +84,6 @@ extern int sis_final_context(struct drm_device * dev, int context);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern struct drm_ioctl_desc sis_ioctls[];
|
extern struct drm_ioctl_desc sis_ioctls[];
|
||||||
extern int sis_max_ioctl;
|
extern int sis_max_ioctl;
|
||||||
|
|
||||||
|
|
|
@ -1643,7 +1643,6 @@
|
||||||
#define HC_HAGPBpID_STOP 0x00000002
|
#define HC_HAGPBpID_STOP 0x00000002
|
||||||
#define HC_HAGPBpH_MASK 0x00ffffff
|
#define HC_HAGPBpH_MASK 0x00ffffff
|
||||||
|
|
||||||
|
|
||||||
#define VIA_VIDEO_HEADER5 0xFE040000
|
#define VIA_VIDEO_HEADER5 0xFE040000
|
||||||
#define VIA_VIDEO_HEADER6 0xFE050000
|
#define VIA_VIDEO_HEADER6 0xFE050000
|
||||||
#define VIA_VIDEO_HEADER7 0xFE060000
|
#define VIA_VIDEO_HEADER7 0xFE060000
|
||||||
|
|
|
@ -477,6 +477,7 @@ static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
|
||||||
vb = via_get_dma(dev_priv);
|
vb = via_get_dma(dev_priv);
|
||||||
VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
|
VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
|
||||||
(VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16);
|
(VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16);
|
||||||
|
|
||||||
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
|
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
|
||||||
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
|
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
|
||||||
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
|
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
|
||||||
|
@ -603,7 +604,6 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
|
||||||
via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0);
|
via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
|
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
|
||||||
{
|
{
|
||||||
via_cmdbuf_jump(dev_priv);
|
via_cmdbuf_jump(dev_priv);
|
||||||
|
|
|
@ -76,8 +76,7 @@ static maskarray_t via_pro_group_a_irqs[] = {
|
||||||
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
|
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
|
||||||
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
|
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
|
||||||
};
|
};
|
||||||
static int via_num_pro_group_a =
|
static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs);
|
||||||
sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t);
|
|
||||||
static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
|
static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
|
||||||
|
|
||||||
static maskarray_t via_unichrome_irqs[] = {
|
static maskarray_t via_unichrome_irqs[] = {
|
||||||
|
@ -86,7 +85,7 @@ static maskarray_t via_unichrome_irqs[] = {
|
||||||
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
|
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
|
||||||
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
|
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
|
||||||
};
|
};
|
||||||
static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t);
|
static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs);
|
||||||
static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
|
static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -33,8 +33,6 @@ typedef enum {
|
||||||
tex_address
|
tex_address
|
||||||
} drm_via_sequence_t;
|
} drm_via_sequence_t;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
unsigned texture;
|
unsigned texture;
|
||||||
uint32_t z_addr;
|
uint32_t z_addr;
|
||||||
|
|
Loading…
Reference in New Issue