Debug message and comment clean up in xgi_submit_cmdlist.
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15245b670e
commit
a33f548729
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@ -66,58 +66,43 @@ static void xgi_submit_cmdlist(struct xgi_info * info,
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{
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const unsigned int beginPort = getCurBatchBeginPort(pCmdInfo);
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DRM_INFO("After getCurBatchBeginPort()\n");
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if (s_cmdring._lastBatchStartAddr == 0) {
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const unsigned int portOffset = BASE_3D_ENG + beginPort;
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/* Jong 06/13/2006; remove marked for system hang test */
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/* xgi_waitfor_pci_idle(info); */
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// Enable PCI Trigger Mode
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/* Enable PCI Trigger Mode
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*/
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DRM_INFO("Enable PCI Trigger Mode \n");
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/* Jong 06/14/2006; 0x400001a */
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dwWriteReg(info->mmio_map,
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BASE_3D_ENG + M2REG_AUTO_LINK_SETTING_ADDRESS,
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(M2REG_AUTO_LINK_SETTING_ADDRESS << 22) |
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M2REG_CLEAR_COUNTERS_MASK | 0x08 |
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M2REG_PCI_TRIGGER_MODE_MASK);
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/* Jong 06/14/2006; 0x400000a */
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dwWriteReg(info->mmio_map,
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BASE_3D_ENG + M2REG_AUTO_LINK_SETTING_ADDRESS,
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(M2REG_AUTO_LINK_SETTING_ADDRESS << 22) | 0x08 |
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M2REG_PCI_TRIGGER_MODE_MASK);
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// Send PCI begin command
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DRM_INFO("Send PCI begin command \n");
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/* Send PCI begin command
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*/
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DRM_INFO("portOffset=%d, beginPort=%d\n",
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portOffset, beginPort);
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/* beginPort = 48; */
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/* 0xc100000 */
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dwWriteReg(info->mmio_map, portOffset,
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(beginPort << 22) + (BEGIN_VALID_MASK) +
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pCmdInfo->_curDebugID);
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DRM_INFO("Send PCI begin command- After\n");
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/* 0x80000024 */
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dwWriteReg(info->mmio_map, portOffset + 4,
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BEGIN_LINK_ENABLE_MASK + pCmdInfo->_firstSize);
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/* 0x1010000 */
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dwWriteReg(info->mmio_map, portOffset + 8,
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(pCmdInfo->_firstBeginAddr >> 4));
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/* Jong 06/12/2006; system hang; marked for test */
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dwWriteReg(info->mmio_map, portOffset + 12, 0);
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/* Jong 06/13/2006; remove marked for system hang test */
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/* xgi_waitfor_pci_idle(info); */
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} else {
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u32 *lastBatchVirtAddr;
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@ -154,7 +139,7 @@ static void xgi_submit_cmdlist(struct xgi_info * info,
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}
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s_cmdring._lastBatchStartAddr = pCmdInfo->_lastBeginAddr;
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DRM_INFO("End\n");
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DRM_INFO("%s: exit\n", __func__);
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}
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