nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.
parent
bd0418cb01
commit
ab72a7714e
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@ -368,12 +368,7 @@ static void nouveau_nv30_context_init(drm_device_t *dev,
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RAMFC_WR(ACQUIRE_TIMESTAMP, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMESTAMP));
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RAMFC_WR(ACQUIRE_TIMEOUT, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMEOUT));
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RAMFC_WR(SEMAPHORE, NV_READ(NV_PFIFO_CACH1_SEMAPHORE));
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NV_WRITE(NV_PGRAPH_CHANNEL_CTX_SIZE, grctx_inst); /* Misnomer. Really a ptr to the grctx */
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/*
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* TODO: We need to put this somewhere...
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*/
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/*INSTANCE_WR(dev_priv->ctx_table, init->channel, grctx_inst);*/
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RAMFC_WR(DMA_SUBROUTINE, init->put_base);
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}
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