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nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.

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Jeremy Kolb 2007-01-18 21:39:09 -05:00
parent bd0418cb01
commit ab72a7714e
1 changed files with 0 additions and 5 deletions
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5
shared-core/nouveau_fifo.c
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@ -368,12 +368,7 @@ static void nouveau_nv30_context_init(drm_device_t *dev,
RAMFC_WR(ACQUIRE_TIMESTAMP, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMESTAMP)); RAMFC_WR(ACQUIRE_TIMESTAMP, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMESTAMP));
RAMFC_WR(ACQUIRE_TIMEOUT, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMEOUT)); RAMFC_WR(ACQUIRE_TIMEOUT, NV_READ(NV_PFIFO_CACH1_ACQUIRE_TIMEOUT));
RAMFC_WR(SEMAPHORE, NV_READ(NV_PFIFO_CACH1_SEMAPHORE)); RAMFC_WR(SEMAPHORE, NV_READ(NV_PFIFO_CACH1_SEMAPHORE));
NV_WRITE(NV_PGRAPH_CHANNEL_CTX_SIZE, grctx_inst); /* Misnomer. Really a ptr to the grctx */
/*
* TODO: We need to put this somewhere...
*/
/*INSTANCE_WR(dev_priv->ctx_table, init->channel, grctx_inst);*/
RAMFC_WR(DMA_SUBROUTINE, init->put_base); RAMFC_WR(DMA_SUBROUTINE, init->put_base);
} }