amdgpu: add amdgpu_query_sw_info for querying high bits of 32-bit address space

Reviewed-by: Christian König <christian.koenig@amd.com>
main
Marek Olšák 2018-02-02 18:15:00 +01:00
parent deb59781fc
commit ad5b702fec
3 changed files with 36 additions and 0 deletions

View File

@ -94,6 +94,10 @@ enum amdgpu_gpu_va_range
amdgpu_gpu_va_range_general = 0 amdgpu_gpu_va_range_general = 0
}; };
enum amdgpu_sw_info {
amdgpu_sw_info_address32_hi = 0,
};
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
/* -------------------------- Datatypes ----------------------------------- */ /* -------------------------- Datatypes ----------------------------------- */
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
@ -1085,6 +1089,23 @@ int amdgpu_query_gpu_info(amdgpu_device_handle dev,
int amdgpu_query_info(amdgpu_device_handle dev, unsigned info_id, int amdgpu_query_info(amdgpu_device_handle dev, unsigned info_id,
unsigned size, void *value); unsigned size, void *value);
/**
* Query hardware or driver information.
*
* The return size is query-specific and depends on the "info_id" parameter.
* No more than "size" bytes is returned.
*
* \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
* \param info - \c [in] amdgpu_sw_info_*
* \param value - \c [out] Pointer to the return value.
*
* \return 0 on success\n
* <0 - Negative POSIX error code
*
*/
int amdgpu_query_sw_info(amdgpu_device_handle dev, enum amdgpu_sw_info info,
void *value);
/** /**
* Query information about GDS * Query information about GDS
* *

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@ -275,6 +275,7 @@ int amdgpu_device_initialize(int fd,
max = MIN2(max, (start & ~0xffffffffULL) + 0x100000000ULL); max = MIN2(max, (start & ~0xffffffffULL) + 0x100000000ULL);
amdgpu_vamgr_init(&dev->vamgr_32, start, max, amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment); dev->dev_info.virtual_address_alignment);
dev->address32_hi = start >> 32;
start = max; start = max;
if (dev->dev_info.high_va_offset && dev->dev_info.high_va_max) if (dev->dev_info.high_va_offset && dev->dev_info.high_va_max)
@ -312,3 +313,16 @@ const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{ {
return dev->marketing_name; return dev->marketing_name;
} }
int amdgpu_query_sw_info(amdgpu_device_handle dev, enum amdgpu_sw_info info,
void *value)
{
uint32_t *val32 = (uint32_t*)value;
switch (info) {
case amdgpu_sw_info_address32_hi:
*val32 = dev->address32_hi;
return 0;
}
return -EINVAL;
}

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@ -73,6 +73,7 @@ struct amdgpu_device {
int flink_fd; int flink_fd;
unsigned major_version; unsigned major_version;
unsigned minor_version; unsigned minor_version;
uint32_t address32_hi;
char *marketing_name; char *marketing_name;
/** List of buffer handles. Protected by bo_table_mutex. */ /** List of buffer handles. Protected by bo_table_mutex. */