Create permanent maps of framebuffer, aperture and MMIO registers. Added
chipset-type information in driver data field of Savage PCI-IDs. Added missing PCI-ID 0x8d03 (ProSavageDDR on Pentium boards). Don't require AGP.main
parent
27fc998f7d
commit
af326f6f0c
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@ -26,6 +26,7 @@
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/*=========================================================*/
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/*=========================================================*/
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#include "savage.h"
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#include "savage.h"
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#include "drmP.h"
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#include "drmP.h"
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#include "savage_drm.h"
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#include "savage_drv.h"
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#include "savage_drv.h"
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/interrupt.h> /* For task queue support */
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@ -34,7 +35,54 @@
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#define SAVAGE_DEFAULT_USEC_TIMEOUT 10000
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#define SAVAGE_DEFAULT_USEC_TIMEOUT 10000
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#define SAVAGE_FREELIST_DEBUG 0
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#define SAVAGE_FREELIST_DEBUG 0
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static int savage_preinit( drm_device_t *dev, unsigned long chipset )
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{
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drm_savage_private_t *dev_priv;
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unsigned mmioBase, fbBase, fbSize, apertureBase;
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int ret = 0;
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dev_priv = DRM(alloc)( sizeof(drm_savage_private_t), DRM_MEM_DRIVER );
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if ( dev_priv == NULL )
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return DRM_ERR(ENOMEM);
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memset( dev_priv, 0, sizeof(drm_savage_private_t) );
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dev->dev_private = (void *)dev_priv;
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dev_priv->chipset = (enum savage_family)chipset;
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if( S3_SAVAGE3D_SERIES(dev_priv->chipset) ) {
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fbBase = pci_resource_start( dev->pdev, 0 );
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fbSize = SAVAGE_FB_SIZE_S3;
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mmioBase = fbBase + fbSize;
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apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
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} else if( chipset != S3_SUPERSAVAGE ) {
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mmioBase = pci_resource_start( dev->pdev, 0 );
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fbBase = pci_resource_start( dev->pdev, 1 );
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fbSize = SAVAGE_FB_SIZE_S4;
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apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
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} else {
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mmioBase = pci_resource_start( dev->pdev, 0 );
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fbBase = pci_resource_start( dev->pdev, 1 );
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fbSize = pci_resource_len( dev->pdev, 1 );
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apertureBase = pci_resource_start( dev->pdev, 2 );
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}
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if( (ret = DRM(initmap)( dev, mmioBase, SAVAGE_MMIO_SIZE,
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_DRM_REGISTERS, 0 )))
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return ret;
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if( (ret = DRM(initmap)( dev, fbBase, fbSize,
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_DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
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return ret;
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if( (ret = DRM(initmap)( dev, apertureBase, SAVAGE_APERTURE_SIZE,
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_DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
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return ret;
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return ret;
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}
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void DRM(driver_register_fns)(drm_device_t *dev)
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void DRM(driver_register_fns)(drm_device_t *dev)
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{
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{
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dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR;
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dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR;
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dev->fn_tbl.preinit = savage_preinit;
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}
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}
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@ -24,4 +24,49 @@
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#ifndef __SAVAGE_DRV_H__
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#ifndef __SAVAGE_DRV_H__
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#define __SAVAGE_DRV_H__
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#define __SAVAGE_DRV_H__
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/* these chip tags should match the ones in the 2D driver in savage_regs.h. */
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enum savage_family {
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S3_UNKNOWN = 0,
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S3_SAVAGE3D,
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S3_SAVAGE_MX,
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S3_SAVAGE4,
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S3_PROSAVAGE,
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S3_TWISTER,
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S3_PROSAVAGEDDR,
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S3_SUPERSAVAGE,
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S3_SAVAGE2000,
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S3_LAST
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};
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#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
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#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
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|| (chip==S3_PROSAVAGE) \
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|| (chip==S3_TWISTER) \
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|| (chip==S3_PROSAVAGEDDR))
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#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
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#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
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#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \
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||(chip==S3_PROSAVAGEDDR))
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/* flags */
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#define SAVAGE_IS_AGP 1
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typedef struct drm_savage_private {
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drm_savage_sarea_t *sarea_priv;
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enum savage_family chipset;
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unsigned flags;
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} drm_savage_private_t;
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#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
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#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
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#define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
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#define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
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#define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
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#endif /* end #ifndef __SAVAGE_DRV_ */
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#endif /* end #ifndef __SAVAGE_DRV_ */
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@ -26,6 +26,7 @@
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/*=========================================================*/
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/*=========================================================*/
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#include "savage.h"
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#include "savage.h"
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#include "drmP.h"
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#include "drmP.h"
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#include "savage_drm.h"
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#include "savage_drv.h"
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#include "savage_drv.h"
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/interrupt.h> /* For task queue support */
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@ -34,7 +35,54 @@
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#define SAVAGE_DEFAULT_USEC_TIMEOUT 10000
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#define SAVAGE_DEFAULT_USEC_TIMEOUT 10000
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#define SAVAGE_FREELIST_DEBUG 0
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#define SAVAGE_FREELIST_DEBUG 0
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static int savage_preinit( drm_device_t *dev, unsigned long chipset )
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{
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drm_savage_private_t *dev_priv;
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unsigned mmioBase, fbBase, fbSize, apertureBase;
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int ret = 0;
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dev_priv = DRM(alloc)( sizeof(drm_savage_private_t), DRM_MEM_DRIVER );
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if ( dev_priv == NULL )
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return DRM_ERR(ENOMEM);
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memset( dev_priv, 0, sizeof(drm_savage_private_t) );
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dev->dev_private = (void *)dev_priv;
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dev_priv->chipset = (enum savage_family)chipset;
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if( S3_SAVAGE3D_SERIES(dev_priv->chipset) ) {
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fbBase = pci_resource_start( dev->pdev, 0 );
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fbSize = SAVAGE_FB_SIZE_S3;
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mmioBase = fbBase + fbSize;
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apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
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} else if( chipset != S3_SUPERSAVAGE ) {
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mmioBase = pci_resource_start( dev->pdev, 0 );
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fbBase = pci_resource_start( dev->pdev, 1 );
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fbSize = SAVAGE_FB_SIZE_S4;
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apertureBase = fbBase + SAVAGE_APERTURE_OFFSET;
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} else {
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mmioBase = pci_resource_start( dev->pdev, 0 );
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fbBase = pci_resource_start( dev->pdev, 1 );
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fbSize = pci_resource_len( dev->pdev, 1 );
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apertureBase = pci_resource_start( dev->pdev, 2 );
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}
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if( (ret = DRM(initmap)( dev, mmioBase, SAVAGE_MMIO_SIZE,
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_DRM_REGISTERS, 0 )))
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return ret;
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if( (ret = DRM(initmap)( dev, fbBase, fbSize,
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_DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
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return ret;
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if( (ret = DRM(initmap)( dev, apertureBase, SAVAGE_APERTURE_SIZE,
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_DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING )))
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return ret;
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return ret;
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}
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void DRM(driver_register_fns)(drm_device_t *dev)
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void DRM(driver_register_fns)(drm_device_t *dev)
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{
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{
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dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR;
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dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR;
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dev->fn_tbl.preinit = savage_preinit;
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}
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}
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#ifndef __SAVAGE_DRV_H__
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#ifndef __SAVAGE_DRV_H__
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#define __SAVAGE_DRV_H__
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#define __SAVAGE_DRV_H__
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/* these chip tags should match the ones in the 2D driver in savage_regs.h. */
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enum savage_family {
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S3_UNKNOWN = 0,
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S3_SAVAGE3D,
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S3_SAVAGE_MX,
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S3_SAVAGE4,
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S3_PROSAVAGE,
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S3_TWISTER,
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S3_PROSAVAGEDDR,
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S3_SUPERSAVAGE,
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S3_SAVAGE2000,
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S3_LAST
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};
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#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
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#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
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|| (chip==S3_PROSAVAGE) \
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|| (chip==S3_TWISTER) \
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|| (chip==S3_PROSAVAGEDDR))
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#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
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#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
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#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \
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||(chip==S3_PROSAVAGEDDR))
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/* flags */
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#define SAVAGE_IS_AGP 1
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typedef struct drm_savage_private {
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drm_savage_sarea_t *sarea_priv;
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enum savage_family chipset;
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unsigned flags;
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} drm_savage_private_t;
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#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
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#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
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#define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
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#define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
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#define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
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#endif /* end #ifndef __SAVAGE_DRV_ */
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#endif /* end #ifndef __SAVAGE_DRV_ */
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@ -161,28 +161,29 @@
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0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1"
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0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1"
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[savage]
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[savage]
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0x5333 0x8a22 0 "Savage4"
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0x5333 0x8a22 S3_SAVAGE4 "Savage4"
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0x5333 0x8a23 0 "Savage4"
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0x5333 0x8a23 S3_SAVAGE4 "Savage4"
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0x5333 0x8c10 0 "Savage/MX-MV"
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0x5333 0x8c10 S3_SAVAGE_MX "Savage/MX-MV"
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0x5333 0x8c11 0 "Savage/MX"
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0x5333 0x8c11 S3_SAVAGE_MX "Savage/MX"
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0x5333 0x8c12 0 "Savage/IX-MV"
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0x5333 0x8c12 S3_SAVAGE_MX "Savage/IX-MV"
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0x5333 0x8c13 0 "Savage/IX"
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0x5333 0x8c13 S3_SAVAGE_MX "Savage/IX"
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0x5333 0x8c20 0 "Savage 3D"
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0x5333 0x8c20 S3_SAVAGE3D "Savage 3D"
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0x5333 0x8c21 0 "Savage 3D/MV"
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0x5333 0x8c21 S3_SAVAGE3D "Savage 3D/MV"
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0x5333 0x8c22 0 "SuperSavage MX/128"
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0x5333 0x8c22 S3_SUPERSAVAGE "SuperSavage MX/128"
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0x5333 0x8c24 0 "SuperSavage MX/64"
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0x5333 0x8c24 S3_SUPERSAVAGE "SuperSavage MX/64"
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0x5333 0x8c26 0 "SuperSavage MX/64C"
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0x5333 0x8c26 S3_SUPERSAVAGE "SuperSavage MX/64C"
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0x5333 0x8c2a 0 "SuperSavage IX/128 SDR"
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0x5333 0x8c2a S3_SUPERSAVAGE "SuperSavage IX/128 SDR"
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0x5333 0x8c2b 0 "SuperSavage IX/128 DDR"
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0x5333 0x8c2b S3_SUPERSAVAGE "SuperSavage IX/128 DDR"
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0x5333 0x8c2c 0 "SuperSavage IX/64 SDR"
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0x5333 0x8c2c S3_SUPERSAVAGE "SuperSavage IX/64 SDR"
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0x5333 0x8c2d 0 "SuperSavage IX/64 DDR"
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0x5333 0x8c2d S3_SUPERSAVAGE "SuperSavage IX/64 DDR"
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0x5333 0x8c2e 0 "SuperSavage IX/C SDR"
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0x5333 0x8c2e S3_SUPERSAVAGE "SuperSavage IX/C SDR"
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0x5333 0x8c2f 0 "SuperSavage IX/C DDR"
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0x5333 0x8c2f S3_SUPERSAVAGE "SuperSavage IX/C DDR"
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0x5333 0x8a25 0 "ProSavage PM133"
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0x5333 0x8a25 S3_PROSAVAGE "ProSavage PM133"
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0x5333 0x8a26 0 "ProSavage KM133"
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0x5333 0x8a26 S3_PROSAVAGE "ProSavage KM133"
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0x5333 0x8d01 0 "ProSavage PN133"
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0x5333 0x8d01 S3_TWISTER "ProSavage Twister PN133"
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0x5333 0x8d02 0 "ProSavage KN133"
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0x5333 0x8d02 S3_TWISTER "ProSavage Twister KN133"
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0x5333 0x8d04 0 "ProSavage DDR"
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0x5333 0x8d03 S3_PROSAVAGEDDR "ProSavage DDR"
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0x5333 0x8d04 S3_PROSAVAGEDDR "ProSavage DDR-K"
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[ffb]
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[ffb]
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0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1"
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0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1"
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[savage]
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[savage]
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0x5333 0x8a22 0 "Savage4"
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0x5333 0x8a22 S3_SAVAGE4 "Savage4"
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0x5333 0x8a23 0 "Savage4"
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0x5333 0x8a23 S3_SAVAGE4 "Savage4"
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0x5333 0x8c10 0 "Savage/MX-MV"
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0x5333 0x8c10 S3_SAVAGE_MX "Savage/MX-MV"
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0x5333 0x8c11 0 "Savage/MX"
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0x5333 0x8c11 S3_SAVAGE_MX "Savage/MX"
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0x5333 0x8c12 0 "Savage/IX-MV"
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0x5333 0x8c12 S3_SAVAGE_MX "Savage/IX-MV"
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0x5333 0x8c13 0 "Savage/IX"
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0x5333 0x8c13 S3_SAVAGE_MX "Savage/IX"
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0x5333 0x8c20 0 "Savage 3D"
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0x5333 0x8c20 S3_SAVAGE3D "Savage 3D"
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0x5333 0x8c21 0 "Savage 3D/MV"
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0x5333 0x8c21 S3_SAVAGE3D "Savage 3D/MV"
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0x5333 0x8c22 0 "SuperSavage MX/128"
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0x5333 0x8c22 S3_SUPERSAVAGE "SuperSavage MX/128"
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0x5333 0x8c24 0 "SuperSavage MX/64"
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0x5333 0x8c24 S3_SUPERSAVAGE "SuperSavage MX/64"
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0x5333 0x8c26 0 "SuperSavage MX/64C"
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0x5333 0x8c26 S3_SUPERSAVAGE "SuperSavage MX/64C"
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0x5333 0x8c2a 0 "SuperSavage IX/128 SDR"
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0x5333 0x8c2a S3_SUPERSAVAGE "SuperSavage IX/128 SDR"
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0x5333 0x8c2b 0 "SuperSavage IX/128 DDR"
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0x5333 0x8c2b S3_SUPERSAVAGE "SuperSavage IX/128 DDR"
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0x5333 0x8c2c 0 "SuperSavage IX/64 SDR"
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0x5333 0x8c2c S3_SUPERSAVAGE "SuperSavage IX/64 SDR"
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0x5333 0x8c2d 0 "SuperSavage IX/64 DDR"
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0x5333 0x8c2d S3_SUPERSAVAGE "SuperSavage IX/64 DDR"
|
||||||
0x5333 0x8c2e 0 "SuperSavage IX/C SDR"
|
0x5333 0x8c2e S3_SUPERSAVAGE "SuperSavage IX/C SDR"
|
||||||
0x5333 0x8c2f 0 "SuperSavage IX/C DDR"
|
0x5333 0x8c2f S3_SUPERSAVAGE "SuperSavage IX/C DDR"
|
||||||
0x5333 0x8a25 0 "ProSavage PM133"
|
0x5333 0x8a25 S3_PROSAVAGE "ProSavage PM133"
|
||||||
0x5333 0x8a26 0 "ProSavage KM133"
|
0x5333 0x8a26 S3_PROSAVAGE "ProSavage KM133"
|
||||||
0x5333 0x8d01 0 "ProSavage PN133"
|
0x5333 0x8d01 S3_TWISTER "ProSavage Twister PN133"
|
||||||
0x5333 0x8d02 0 "ProSavage KN133"
|
0x5333 0x8d02 S3_TWISTER "ProSavage Twister KN133"
|
||||||
0x5333 0x8d04 0 "ProSavage DDR"
|
0x5333 0x8d03 S3_PROSAVAGEDDR "ProSavage DDR"
|
||||||
|
0x5333 0x8d04 S3_PROSAVAGEDDR "ProSavage DDR-K"
|
||||||
|
|
||||||
[ffb]
|
[ffb]
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue