fix G33 hardware status page in modeset
We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D driver can't alloc gfx memory when working in drm modeset.main
parent
3f66a0005c
commit
af60d87869
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@ -997,6 +997,10 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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if (drm_core_check_feature(dev, DRIVER_MODESET))
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return 0;
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DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
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dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
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@ -124,6 +124,7 @@ struct drm_i915_private {
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uint32_t counter;
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unsigned int status_gfx_addr;
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drm_local_map_t hws_map;
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struct drm_buffer_object *hws_bo;
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unsigned int cpp;
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int use_mi_batchbuffer_start;
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@ -252,6 +252,38 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->dma_status_page);
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} else {
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size = 4 * 1024;
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ret = drm_buffer_object_create(dev, size,
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drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->hws_bo);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin ring buffer\n");
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return -EINVAL;
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}
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dev_priv->status_gfx_addr =
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dev_priv->hws_bo->offset & (0x1ffff << 12);
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dev_priv->hws_map.offset = dev->agp->base +
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dev_priv->hws_bo->offset;
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dev_priv->hws_map.size = size;
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dev_priv->hws_map.type = 0;
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dev_priv->hws_map.flags = 0;
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dev_priv->hws_map.mtrr = 0;
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drm_core_ioremap(&dev_priv->hws_map, dev);
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if (dev_priv->hws_map.handle == NULL) {
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dev_priv->status_gfx_addr = 0;
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DRM_ERROR("can not ioremap virtual addr"
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" for G33 hw status page\n");
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return -ENOMEM;
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}
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dev_priv->hw_status_page = dev_priv->hws_map.handle;
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memset(dev_priv->hw_status_page, 0, size);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->status_gfx_addr);
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}
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DRM_DEBUG("Enabled hardware status page\n");
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@ -324,6 +356,7 @@ int i915_driver_unload(struct drm_device *dev)
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if (dev_priv->status_gfx_addr) {
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dev_priv->status_gfx_addr = 0;
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drm_core_ioremapfree(&dev_priv->hws_map, dev);
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drm_bo_usage_deref_unlocked(&dev_priv->hws_bo);
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I915_WRITE(I915REG_HWS_PGA, 0x1ffff000);
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}
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