Remove mask parameter from radeon_acknowledge_irqs().

Simply always acknowledge all interrupts we're interested in, to avoid hard
hangs when an unexpected interrupt is flagged.
main
Michel Dänzer 2007-06-22 11:42:54 +02:00
parent 24c09faec1
commit b8dd314875
1 changed files with 9 additions and 7 deletions

View File

@ -81,13 +81,15 @@ void radeon_disable_vblank(drm_device_t *dev, int crtc)
} }
} }
static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv)
u32 mask)
{ {
u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) & u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) &
(mask | RADEON_CRTC_VBLANK_MASK | RADEON_CRTC2_VBLANK_MASK); (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT |
RADEON_CRTC2_VBLANK_STAT);
if (irqs) if (irqs)
RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs); RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs);
return irqs; return irqs;
} }
@ -119,10 +121,12 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
/* Only consider the bits we're interested in - others could be used /* Only consider the bits we're interested in - others could be used
* outside the DRM * outside the DRM
*/ */
stat = radeon_acknowledge_irqs(dev_priv, dev_priv->irq_enable_reg); stat = radeon_acknowledge_irqs(dev_priv);
if (!stat) if (!stat)
return IRQ_NONE; return IRQ_NONE;
stat &= dev_priv->irq_enable_reg;
/* SW interrupt */ /* SW interrupt */
if (stat & RADEON_SW_INT_TEST) if (stat & RADEON_SW_INT_TEST)
DRM_WAKEUP(&dev_priv->swi_queue); DRM_WAKEUP(&dev_priv->swi_queue);
@ -247,9 +251,7 @@ void radeon_driver_irq_preinstall(drm_device_t * dev)
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
/* Clear bits if they're already high */ /* Clear bits if they're already high */
radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | radeon_acknowledge_irqs(dev_priv);
RADEON_CRTC_VBLANK_STAT |
RADEON_CRTC2_VBLANK_STAT));
} }
int radeon_driver_irq_postinstall(drm_device_t * dev) int radeon_driver_irq_postinstall(drm_device_t * dev)