Remove some delays from Intel i2c code, we'll need a more comprehensive fix
in the Linux i2c layer to make DDC reliable on old monitors.main
parent
183cbd92dd
commit
c033698988
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@ -80,8 +80,8 @@ static void set_clock(void *data, int state_high)
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else
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clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
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GPIO_CLOCK_VAL_MASK;
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I915_WRITE(chan->reg, reserved | clock_bits);
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udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
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}
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static void set_data(void *data, int state_high)
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@ -103,7 +103,6 @@ static void set_data(void *data, int state_high)
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GPIO_DATA_VAL_MASK;
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I915_WRITE(chan->reg, reserved | data_bits);
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udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
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}
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/**
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@ -147,7 +146,7 @@ struct intel_i2c_chan *intel_i2c_create(drm_device_t *dev, const u32 reg,
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chan->algo.setscl = set_clock;
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chan->algo.getsda = get_data;
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chan->algo.getscl = get_clock;
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chan->algo.udelay = 20;
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chan->algo.udelay = 20; /* between calls to (set|get)_(clock|data) */
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chan->algo.timeout = usecs_to_jiffies(2200);
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chan->algo.data = chan;
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@ -159,7 +158,6 @@ struct intel_i2c_chan *intel_i2c_create(drm_device_t *dev, const u32 reg,
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/* JJJ: raise SCL and SDA? */
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set_data(chan, 1);
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set_clock(chan, 1);
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udelay(20);
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return chan;
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