tests/amdgpu: add vcn tests support and sets
Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com>main
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01096f2122
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c1f5eea50f
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@ -26,4 +26,5 @@ amdgpu_test_SOURCES = \
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uvd_messages.h \
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vce_tests.c \
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vce_ib.h \
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frame.h
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frame.h \
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vcn_tests.c
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@ -85,6 +85,12 @@ static CU_SuiteInfo suites[] = {
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.pCleanupFunc = suite_vce_tests_clean,
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.pTests = vce_tests,
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},
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{
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.pName = "VCN Tests",
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.pInitFunc = suite_vcn_tests_init,
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.pCleanupFunc = suite_vcn_tests_clean,
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.pTests = vcn_tests,
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},
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CU_SUITE_INFO_NULL,
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};
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@ -104,6 +104,21 @@ int suite_vce_tests_clean();
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*/
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extern CU_TestInfo vce_tests[];
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/**
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+ * Initialize vcn test suite
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+ */
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int suite_vcn_tests_init();
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/**
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+ * Deinitialize vcn test suite
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+ */
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int suite_vcn_tests_clean();
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/**
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+ * Tests in vcn test suite
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+ */
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extern CU_TestInfo vcn_tests[];
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/**
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* Helper functions
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*/
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@ -0,0 +1,277 @@
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdio.h>
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#include <inttypes.h>
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#include "CUnit/Basic.h"
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#include "util_math.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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#define IB_SIZE 4096
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#define MAX_RESOURCES 16
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struct amdgpu_vcn_bo {
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amdgpu_bo_handle handle;
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amdgpu_va_handle va_handle;
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uint64_t addr;
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uint64_t size;
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uint8_t *ptr;
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};
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static uint32_t family_id;
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static amdgpu_context_handle context_handle;
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static amdgpu_bo_handle ib_handle;
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static amdgpu_va_handle ib_va_handle;
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static uint64_t ib_mc_address;
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static uint32_t *ib_cpu;
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static amdgpu_bo_handle resources[MAX_RESOURCES];
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static unsigned num_resources;
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static void amdgpu_cs_vcn_dec_create(void);
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static void amdgpu_cs_vcn_dec_decode(void);
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static void amdgpu_cs_vcn_dec_destroy(void);
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static void amdgpu_cs_vcn_enc_create(void);
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static void amdgpu_cs_vcn_enc_encode(void);
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static void amdgpu_cs_vcn_enc_destroy(void);
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CU_TestInfo vcn_tests[] = {
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{ "VCN DEC create", amdgpu_cs_vcn_dec_create },
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{ "VCN DEC decode", amdgpu_cs_vcn_dec_decode },
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{ "VCN DEC destroy", amdgpu_cs_vcn_dec_destroy },
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{ "VCN ENC create", amdgpu_cs_vcn_enc_create },
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{ "VCN ENC decode", amdgpu_cs_vcn_enc_encode },
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{ "VCN ENC destroy", amdgpu_cs_vcn_enc_destroy },
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CU_TEST_INFO_NULL,
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};
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int suite_vcn_tests_init(void)
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{
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int r;
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r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle);
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if (r)
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return CUE_SINIT_FAILED;
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family_id = device_handle->info.family_id;
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if (family_id < AMDGPU_FAMILY_RV) {
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printf("\n\nThe ASIC NOT support VCN, all sub-tests will pass\n");
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return CUE_SUCCESS;
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}
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r = amdgpu_cs_ctx_create(device_handle, &context_handle);
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if (r)
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return CUE_SINIT_FAILED;
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r = amdgpu_bo_alloc_and_map(device_handle, IB_SIZE, 4096,
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AMDGPU_GEM_DOMAIN_GTT, 0,
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&ib_handle, (void**)&ib_cpu,
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&ib_mc_address, &ib_va_handle);
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if (r)
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return CUE_SINIT_FAILED;
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return CUE_SUCCESS;
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}
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int suite_vcn_tests_clean(void)
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{
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int r;
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if (family_id < AMDGPU_FAMILY_RV) {
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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} else {
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r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
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ib_mc_address, IB_SIZE);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_cs_ctx_free(context_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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}
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return CUE_SUCCESS;
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}
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static int submit(unsigned ndw, unsigned ip)
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{
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struct amdgpu_cs_request ibs_request = {0};
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struct amdgpu_cs_ib_info ib_info = {0};
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struct amdgpu_cs_fence fence_status = {0};
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uint32_t expired;
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int r;
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ib_info.ib_mc_address = ib_mc_address;
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ib_info.size = ndw;
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ibs_request.ip_type = ip;
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r = amdgpu_bo_list_create(device_handle, num_resources, resources,
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NULL, &ibs_request.resources);
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if (r)
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return r;
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ibs_request.number_of_ibs = 1;
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ibs_request.ibs = &ib_info;
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ibs_request.fence_info.handle = NULL;
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r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1);
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if (r)
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return r;
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r = amdgpu_bo_list_destroy(ibs_request.resources);
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if (r)
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return r;
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fence_status.context = context_handle;
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fence_status.ip_type = ip;
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fence_status.fence = ibs_request.seq_no;
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r = amdgpu_cs_query_fence_status(&fence_status,
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AMDGPU_TIMEOUT_INFINITE,
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0, &expired);
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if (r)
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return r;
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return 0;
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}
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static void alloc_resource(struct amdgpu_vcn_bo *vcn_bo,
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unsigned size, unsigned domain)
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{
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struct amdgpu_bo_alloc_request req = {0};
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amdgpu_bo_handle buf_handle;
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amdgpu_va_handle va_handle;
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uint64_t va = 0;
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int r;
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req.alloc_size = ALIGN(size, 4096);
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req.preferred_heap = domain;
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r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_va_range_alloc(device_handle,
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amdgpu_gpu_va_range_general,
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req.alloc_size, 1, 0, &va,
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&va_handle, 0);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0,
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AMDGPU_VA_OP_MAP);
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CU_ASSERT_EQUAL(r, 0);
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vcn_bo->addr = va;
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vcn_bo->handle = buf_handle;
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vcn_bo->size = req.alloc_size;
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vcn_bo->va_handle = va_handle;
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r = amdgpu_bo_cpu_map(vcn_bo->handle, (void **)&vcn_bo->ptr);
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CU_ASSERT_EQUAL(r, 0);
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memset(vcn_bo->ptr, 0, size);
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r = amdgpu_bo_cpu_unmap(vcn_bo->handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void free_resource(struct amdgpu_vcn_bo *vcn_bo)
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{
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int r;
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r = amdgpu_bo_va_op(vcn_bo->handle, 0, vcn_bo->size,
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vcn_bo->addr, 0, AMDGPU_VA_OP_UNMAP);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_va_range_free(vcn_bo->va_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_free(vcn_bo->handle);
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CU_ASSERT_EQUAL(r, 0);
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memset(vcn_bo, 0, sizeof(*vcn_bo));
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}
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static void amdgpu_cs_vcn_dec_create(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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static void amdgpu_cs_vcn_dec_decode(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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static void amdgpu_cs_vcn_dec_destroy(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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static void amdgpu_cs_vcn_enc_create(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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static void amdgpu_cs_vcn_enc_encode(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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static void amdgpu_cs_vcn_enc_destroy(void)
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{
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if (family_id < AMDGPU_FAMILY_RV)
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return;
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/* TODO */
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}
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