intel: Support passing of explicit fencing from execbuf
Allow the caller to pass in an fd to an array of fences to control serialisation of the execbuf in the kernel and on the GPU, and in return allow creation of a fence fd for signaling the completion (and flushing) of the batch. When the returned fence is signaled, all writes to the buffers inside the batch will be complete and coherent from the cpu, or other consumers. The return fence is a sync_file object and can be passed to other users (such as atomic modesetting, or other drivers). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>main
parent
1bd35da961
commit
c4b00767a7
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@ -221,6 +221,12 @@ int drm_intel_gem_context_get_id(drm_intel_context *ctx,
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void drm_intel_gem_context_destroy(drm_intel_context *ctx);
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int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
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int used, unsigned int flags);
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int drm_intel_gem_bo_fence_exec(drm_intel_bo *bo,
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drm_intel_context *ctx,
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int used,
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int in_fence,
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int *out_fence,
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unsigned int flags);
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int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
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drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
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@ -2376,6 +2376,7 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used,
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static int
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do_exec2(drm_intel_bo *bo, int used, drm_intel_context *ctx,
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drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
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int in_fence, int *out_fence,
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unsigned int flags)
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{
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drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
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@ -2430,12 +2431,20 @@ do_exec2(drm_intel_bo *bo, int used, drm_intel_context *ctx,
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else
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i915_execbuffer2_set_context_id(execbuf, ctx->ctx_id);
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execbuf.rsvd2 = 0;
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if (in_fence != -1) {
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execbuf.rsvd2 = in_fence;
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execbuf.flags |= I915_EXEC_FENCE_IN;
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}
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if (out_fence != NULL) {
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*out_fence = -1;
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execbuf.flags |= I915_EXEC_FENCE_OUT;
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}
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if (bufmgr_gem->no_exec)
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goto skip_execution;
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ret = drmIoctl(bufmgr_gem->fd,
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DRM_IOCTL_I915_GEM_EXECBUFFER2,
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DRM_IOCTL_I915_GEM_EXECBUFFER2_WR,
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&execbuf);
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if (ret != 0) {
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ret = -errno;
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@ -2451,6 +2460,9 @@ do_exec2(drm_intel_bo *bo, int used, drm_intel_context *ctx,
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}
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drm_intel_update_buffer_offsets2(bufmgr_gem);
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if (ret == 0 && out_fence != NULL)
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*out_fence = execbuf.rsvd2 >> 32;
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skip_execution:
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if (bufmgr_gem->bufmgr.debug)
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drm_intel_gem_dump_validation_list(bufmgr_gem);
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@ -2476,7 +2488,7 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
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int DR4)
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{
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return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4,
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I915_EXEC_RENDER);
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-1, NULL, I915_EXEC_RENDER);
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}
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static int
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@ -2485,14 +2497,25 @@ drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used,
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unsigned int flags)
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{
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return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4,
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flags);
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-1, NULL, flags);
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}
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int
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drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
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int used, unsigned int flags)
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{
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return do_exec2(bo, used, ctx, NULL, 0, 0, flags);
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return do_exec2(bo, used, ctx, NULL, 0, 0, -1, NULL, flags);
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}
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int
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drm_intel_gem_bo_fence_exec(drm_intel_bo *bo,
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drm_intel_context *ctx,
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int used,
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int in_fence,
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int *out_fence,
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unsigned int flags)
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{
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return do_exec2(bo, used, ctx, NULL, 0, 0, in_fence, out_fence, flags);
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}
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static int
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