Fix EDID pixel clock calculation.
parent
cc7faa4de8
commit
c731b68091
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@ -114,7 +114,7 @@ struct drm_display_mode *drm_mode_detailed(drm_device_t *dev,
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return NULL;
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mode->type = DRM_MODE_TYPE_DRIVER;
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mode->clock = timing->pixel_clock / 100;
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mode->clock = timing->pixel_clock * 10;
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mode->hdisplay = (pt->hactive_hi << 8) | pt->hactive_lo;
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mode->hsync_start = mode->hdisplay + ((pt->hsync_offset_hi << 8) |
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