intel: Add SKL GT4 PCI IDs
Cc: Kristian Høgsberg <krh@bitplanet.net> Cc: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>main
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@ -177,9 +177,13 @@
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#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B
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#define PCI_CHIP_SKYLAKE_HALO_GT1 0x190B
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#define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A
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#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192A
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#define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A
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#define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D
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#define PCI_CHIP_SKYLAKE_SRV_GT4 0x192A
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#define PCI_CHIP_SKYLAKE_DT_GT4 0x1932
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#define PCI_CHIP_SKYLAKE_SRV_GT4X 0x193A
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#define PCI_CHIP_SKYLAKE_H_GT4 0x193B
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#define PCI_CHIP_SKYLAKE_WKS_GT4 0x193D
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#define PCI_CHIP_BROXTON_0 0x0A84
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#define PCI_CHIP_BROXTON_1 0x1A84
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@ -359,12 +363,18 @@
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(devid) == PCI_CHIP_SKYLAKE_WKS_GT2)
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#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3 || \
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(devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \
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(devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
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(devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
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#define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \
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(devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \
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(devid) == PCI_CHIP_SKYLAKE_SRV_GT4X || \
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(devid) == PCI_CHIP_SKYLAKE_H_GT4 || \
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(devid) == PCI_CHIP_SKYLAKE_WKS_GT4)
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#define IS_SKYLAKE(devid) (IS_SKL_GT1(devid) || \
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IS_SKL_GT2(devid) || \
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IS_SKL_GT3(devid))
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IS_SKL_GT3(devid) || \
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IS_SKL_GT4(devid))
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#define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \
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(devid) == PCI_CHIP_BROXTON_1 || \
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