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tests/amdgpu: execute const fill on all the available rings 

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
main
Hawking Zhang 2018-01-08 11:20:29 +08:00 committed by Alex Deucher
parent 168dbe9a0e
commit cbbb8a332d
1 changed files with 78 additions and 71 deletions
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13
tests/amdgpu/basic_tests.c
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@ -981,9 +981,10 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
struct amdgpu_cs_request *ibs_request; struct amdgpu_cs_request *ibs_request;
uint64_t bo_mc; uint64_t bo_mc;
volatile uint32_t *bo_cpu; volatile uint32_t *bo_cpu;
int i, j, r, loop; int i, j, r, loop, ring_id;
uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC}; uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
amdgpu_va_handle va_handle; amdgpu_va_handle va_handle;
struct drm_amdgpu_info_hw_ip hw_ip_info;
pm4 = calloc(pm4_dw, sizeof(*pm4)); pm4 = calloc(pm4_dw, sizeof(*pm4));
CU_ASSERT_NOT_EQUAL(pm4, NULL); CU_ASSERT_NOT_EQUAL(pm4, NULL);
@ -994,6 +995,9 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
ibs_request = calloc(1, sizeof(*ibs_request)); ibs_request = calloc(1, sizeof(*ibs_request));
CU_ASSERT_NOT_EQUAL(ibs_request, NULL); CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &hw_ip_info);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_cs_ctx_create(device_handle, &context_handle); r = amdgpu_cs_ctx_create(device_handle, &context_handle);
CU_ASSERT_EQUAL(r, 0); CU_ASSERT_EQUAL(r, 0);
@ -1001,6 +1005,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
resources = calloc(1, sizeof(amdgpu_bo_handle)); resources = calloc(1, sizeof(amdgpu_bo_handle));
CU_ASSERT_NOT_EQUAL(resources, NULL); CU_ASSERT_NOT_EQUAL(resources, NULL);
for (ring_id = 0; (1 << ring_id) & hw_ip_info.available_rings; ring_id++) {
loop = 0; loop = 0;
while(loop < 2) { while(loop < 2) {
/* allocate UC bo for sDMA use */ /* allocate UC bo for sDMA use */
@ -1020,7 +1025,8 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
i = j = 0; i = j = 0;
if (ip_type == AMDGPU_HW_IP_DMA) { if (ip_type == AMDGPU_HW_IP_DMA) {
if (family_id == AMDGPU_FAMILY_SI) { if (family_id == AMDGPU_FAMILY_SI) {
pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_CONSTANT_FILL_SI, 0, 0, 0, pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_CONSTANT_FILL_SI,
0, 0, 0,
sdma_write_length / 4); sdma_write_length / 4);
pm4[i++] = 0xfffffffc & bo_mc; pm4[i++] = 0xfffffffc & bo_mc;
pm4[i++] = 0xdeadbeaf; pm4[i++] = 0xdeadbeaf;
@ -1063,7 +1069,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
} }
amdgpu_test_exec_cs_helper(context_handle, amdgpu_test_exec_cs_helper(context_handle,
ip_type, 0, ip_type, ring_id,
i, pm4, i, pm4,
1, resources, 1, resources,
ib_info, ibs_request); ib_info, ibs_request);
@ -1079,6 +1085,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
CU_ASSERT_EQUAL(r, 0); CU_ASSERT_EQUAL(r, 0);
loop++; loop++;
} }
}
/* clean resources */ /* clean resources */
free(resources); free(resources);
free(ibs_request); free(ibs_request);