headers: Update drm.h
This needs the kernel patch to make sure the C++ protection is in place. Otherwise just new defines, using the right fixed-width types and some shuffling in where stuff is defined (the DRM_CAP list moved, but the #defines are the same). Generated using make headers_install. Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>main
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89cdda3d5f
commit
cc9a53f076
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@ -36,7 +36,7 @@
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#ifndef _DRM_H_
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#ifndef _DRM_H_
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#define _DRM_H_
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#define _DRM_H_
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#if defined(__linux__)
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#if defined(__linux__)
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#include <linux/types.h>
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#include <linux/types.h>
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#include <asm/ioctl.h>
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#include <asm/ioctl.h>
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@ -54,6 +54,7 @@ typedef int32_t __s32;
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typedef uint32_t __u32;
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typedef uint32_t __u32;
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typedef int64_t __s64;
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typedef int64_t __s64;
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typedef uint64_t __u64;
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typedef uint64_t __u64;
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typedef size_t __kernel_size_t;
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typedef unsigned long drm_handle_t;
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typedef unsigned long drm_handle_t;
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#endif
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#endif
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@ -129,11 +130,11 @@ struct drm_version {
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int version_major; /**< Major version */
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int version_major; /**< Major version */
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int version_minor; /**< Minor version */
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int version_minor; /**< Minor version */
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int version_patchlevel; /**< Patch level */
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int version_patchlevel; /**< Patch level */
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size_t name_len; /**< Length of name buffer */
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__kernel_size_t name_len; /**< Length of name buffer */
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char *name; /**< Name of driver */
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char *name; /**< Name of driver */
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size_t date_len; /**< Length of date buffer */
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__kernel_size_t date_len; /**< Length of date buffer */
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char *date; /**< User-space buffer to hold date */
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char *date; /**< User-space buffer to hold date */
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size_t desc_len; /**< Length of desc buffer */
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__kernel_size_t desc_len; /**< Length of desc buffer */
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char *desc; /**< User-space buffer to hold desc */
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char *desc; /**< User-space buffer to hold desc */
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};
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};
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@ -143,7 +144,7 @@ struct drm_version {
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* \sa drmGetBusid() and drmSetBusId().
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* \sa drmGetBusid() and drmSetBusId().
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*/
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*/
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struct drm_unique {
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struct drm_unique {
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size_t unique_len; /**< Length of unique */
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__kernel_size_t unique_len; /**< Length of unique */
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char *unique; /**< Unique name for driver instantiation */
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char *unique; /**< Unique name for driver instantiation */
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};
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};
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@ -180,7 +181,7 @@ enum drm_map_type {
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_DRM_SHM = 2, /**< shared, cached */
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_DRM_SHM = 2, /**< shared, cached */
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_DRM_AGP = 3, /**< AGP/GART */
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_DRM_AGP = 3, /**< AGP/GART */
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_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
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_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
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_DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
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_DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
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};
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};
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/**
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/**
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@ -466,12 +467,15 @@ struct drm_irq_busid {
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enum drm_vblank_seq_type {
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enum drm_vblank_seq_type {
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_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
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_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
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_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
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_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
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/* bits 1-6 are reserved for high crtcs */
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_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
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_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
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_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
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_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
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_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
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_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
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_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
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_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
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_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
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_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
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_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
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};
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};
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#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
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#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
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#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
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#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
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#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
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@ -611,6 +615,28 @@ struct drm_gem_open {
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__u64 size;
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__u64 size;
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};
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};
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#define DRM_CAP_DUMB_BUFFER 0x1
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#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
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#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
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#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
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#define DRM_CAP_PRIME 0x5
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#define DRM_PRIME_CAP_IMPORT 0x1
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#define DRM_PRIME_CAP_EXPORT 0x2
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#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
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#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
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/*
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* The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight
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* combination for the hardware cursor. The intention is that a hardware
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* agnostic userspace can query a cursor plane size to use.
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*
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* Note that the cross-driver contract is to merely return a valid size;
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* drivers are free to attach another meaning on top, eg. i915 returns the
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* maximum plane size.
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*/
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#define DRM_CAP_CURSOR_WIDTH 0x8
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#define DRM_CAP_CURSOR_HEIGHT 0x9
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#define DRM_CAP_ADDFB2_MODIFIERS 0x10
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/** DRM_IOCTL_GET_CAP ioctl argument type */
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/** DRM_IOCTL_GET_CAP ioctl argument type */
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struct drm_get_cap {
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struct drm_get_cap {
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__u64 capability;
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__u64 capability;
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@ -629,17 +655,17 @@ struct drm_get_cap {
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/**
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/**
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* DRM_CLIENT_CAP_UNIVERSAL_PLANES
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* DRM_CLIENT_CAP_UNIVERSAL_PLANES
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*
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*
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* if set to 1, the DRM core will expose the full universal plane list
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* If set to 1, the DRM core will expose all planes (overlay, primary, and
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* (including primary and cursor planes).
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* cursor) to userspace.
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*/
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*/
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#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
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#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
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/**
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/**
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* DRM_CLIENT_CAP_ATOMIC
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* DRM_CLIENT_CAP_ATOMIC
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*
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*
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* If set to 1, the DRM core will allow atomic modesetting requests.
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* If set to 1, the DRM core will expose atomic properties to userspace
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*/
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*/
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#define DRM_CLIENT_CAP_ATOMIC 3
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#define DRM_CLIENT_CAP_ATOMIC 3
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/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
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/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
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struct drm_set_client_cap {
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struct drm_set_client_cap {
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@ -647,6 +673,7 @@ struct drm_set_client_cap {
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__u64 value;
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__u64 value;
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};
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};
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#define DRM_RDWR O_RDWR
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#define DRM_CLOEXEC O_CLOEXEC
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#define DRM_CLOEXEC O_CLOEXEC
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struct drm_prime_handle {
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struct drm_prime_handle {
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__u32 handle;
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__u32 handle;
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@ -742,8 +769,8 @@ struct drm_prime_handle {
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#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
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#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
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#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
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#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
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#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
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#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
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#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
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#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
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#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
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#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
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#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
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#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
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#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
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#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
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@ -770,7 +797,7 @@ struct drm_prime_handle {
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/**
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/**
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* Device specific ioctls should only be in their respective headers
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* Device specific ioctls should only be in their respective headers
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* The device specific ioctl range is from 0x40 to 0x99.
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* The device specific ioctl range is from 0x40 to 0x9f.
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* Generic IOCTLS restart at 0xA0.
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* Generic IOCTLS restart at 0xA0.
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*
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*
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* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
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* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
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@ -808,18 +835,6 @@ struct drm_event_vblank {
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__u32 reserved;
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__u32 reserved;
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};
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};
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#define DRM_CAP_DUMB_BUFFER 0x1
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#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
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#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
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#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
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#define DRM_CAP_PRIME 0x5
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#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
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#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
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#define DRM_CAP_ADDFB2_MODIFIERS 0x10
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#define DRM_PRIME_CAP_IMPORT 0x1
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#define DRM_PRIME_CAP_EXPORT 0x2
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/* typedef area */
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/* typedef area */
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typedef struct drm_clip_rect drm_clip_rect_t;
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typedef struct drm_clip_rect drm_clip_rect_t;
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typedef struct drm_drawable_info drm_drawable_info_t;
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typedef struct drm_drawable_info drm_drawable_info_t;
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