nouveau: map pci resource 2 on >=nv40
parent
31daf66962
commit
cd3711455e
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@ -108,6 +108,7 @@ typedef struct drm_nouveau_private {
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drm_local_map_t *mmio;
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drm_local_map_t *fb;
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drm_local_map_t *ramin; /* NV40 onwards */
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//TODO: Remove me, I'm bogus :)
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int cur_fifo;
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@ -169,6 +170,11 @@ extern struct mem_block* nouveau_instmem_alloc(struct drm_device *dev,
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uint32_t size, uint32_t align);
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extern void nouveau_instmem_free(struct drm_device *dev,
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struct mem_block *block);
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extern uint32_t nouveau_instmem_r32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index);
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extern void nouveau_instmem_w32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index,
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uint32_t val);
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/* nouveau_fifo.c */
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extern int nouveau_fifo_init(drm_device_t *dev);
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@ -208,8 +214,8 @@ extern long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
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#define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
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#endif
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#define INSTANCE_WR(mem,ofs,val) NV_WRITE(NV_RAMIN+(uint32_t)(mem)->start+((ofs)<<2),(val))
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#define INSTANCE_RD(mem,ofs) NV_READ(NV_RAMIN+(uint32_t)(mem)->start+((ofs)<<2))
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#define INSTANCE_WR(mem,ofs,val) nouveau_instmem_w32(dev_priv,(mem),(ofs),(val))
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#define INSTANCE_RD(mem,ofs) nouveau_instmem_r32(dev_priv,(mem),(ofs))
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#endif /* __NOUVEAU_DRV_H__ */
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@ -492,6 +492,38 @@ void nouveau_instmem_free(struct drm_device *dev, struct mem_block *block)
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}
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}
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uint32_t nouveau_instmem_r32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index)
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{
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uint32_t ofs = (uint32_t)mem->start + (index<<2);
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if (dev_priv->ramin) {
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#if defined(__powerpc__)
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return in_be32((void __iomem *)(dev_priv->ramin)->handle + ofs);
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#else
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return DRM_READ32(dev_priv->ramin, ofs);
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#endif
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} else {
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return NV_READ(NV_RAMIN+ofs);
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}
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}
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void nouveau_instmem_w32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index, uint32_t val)
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{
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uint32_t ofs = (uint32_t)mem->start + (index<<2);
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if (dev_priv->ramin) {
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#if defined(__powerpc__)
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out_be32((void __iomem *)(dev_priv->ramin)->handle + ofs, val);
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#else
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DRM_WRITE32(dev_priv->ramin, ofs, val);
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#endif
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} else {
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NV_WRITE(NV_RAMIN+ofs, val);
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}
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}
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/*
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* Ioctls
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*/
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@ -64,6 +64,21 @@ int nouveau_firstopen(struct drm_device *dev)
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DRM_INFO("%lld MB of video ram detected\n",nouveau_mem_fb_amount(dev)>>20);
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/* map larger RAMIN aperture on NV40 cards */
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if (dev_priv->card_type >= NV_40) {
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ret = drm_addmap(dev, drm_get_resource_start(dev, 2),
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drm_get_resource_len(dev, 2),
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_DRM_REGISTERS,
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_DRM_READ_ONLY,
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&dev_priv->ramin);
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if (ret) {
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DRM_ERROR("Failed to init RAMIN mapping, "
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"limited instance memory available\n");
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dev_priv->ramin = NULL;
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}
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} else
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dev_priv->ramin = NULL;
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/* Clear RAMIN
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* Determine locations for RAMHT/FC/RO
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* Initialise PFIFO
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