nouveau/nv50: skeletal backend
parent
695599f18d
commit
ce0d528d3c
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@ -23,11 +23,11 @@ i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
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nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
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nouveau_object.o nouveau_irq.o nouveau_notifier.o \
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nv04_timer.o \
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nv04_mc.o nv40_mc.o \
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nv04_mc.o nv40_mc.o nv50_mc.o \
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nv04_fb.o nv10_fb.o nv40_fb.o \
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nv04_fifo.o nv10_fifo.o nv40_fifo.o \
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nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
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nv04_graph.o nv10_graph.o nv20_graph.o nv30_graph.o \
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nv40_graph.o
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nv40_graph.o nv50_graph.o
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radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o
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sis-objs := sis_drv.o sis_mm.o
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ffb-objs := ffb_drv.o ffb_context.o
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@ -0,0 +1 @@
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../shared-core/nv50_fifo.c
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@ -0,0 +1 @@
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../shared-core/nv50_graph.c
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@ -0,0 +1 @@
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../shared-core/nv50_mc.c
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@ -596,6 +596,9 @@
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0x10de 0x018d NV_17 "GeForce4 448 Go"
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0x10de 0x0191 NV_50 "GeForce 8800 GTX"
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0x10de 0x0193 NV_50 "GeForce 8800 GTS"
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0x10de 0x0194 NV_50 "GeForce 8800 Ultra"
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0x10de 0x019d NV_50 "Quadro FX 5600"
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0x10de 0x019e NV_50 "Quadro FX 4600"
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0x10de 0x01a0 NV_11|NV_NFORCE "GeForce2 MX Integrated Graphics"
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0x10de 0x01d1 NV_44 "GeForce 7300 LE"
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0x10de 0x01d6 NV_44 "GeForce Go 7200"
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@ -702,6 +705,11 @@
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0x10de 0x03d1 NV_44 "GeForce 6100 nForce 405"
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0x10de 0x03d2 NV_44 "GeForce 6100 nForce 400"
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0x10de 0x03d5 NV_44 "GeForce 6100 nForce 420"
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0x10de 0x0400 NV_50 "GeForce 8600 GTS"
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0x10de 0x0402 NV_50 "GeForce 8600 GT"
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0x10de 0x0421 NV_50 "GeForce 8500 GT"
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0x10de 0x0422 NV_50 "GeForce 8400 GS"
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0x10de 0x0423 NV_50 "GeForce 8300 GS"
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0x12d2 0x0008 NV_03 "NV1"
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0x12d2 0x0009 NV_03 "DAC64"
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0x12d2 0x0018 NV_03 "Riva128"
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@ -295,6 +295,14 @@ extern void nv40_fifo_destroy_context(drm_device_t *, int channel);
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extern int nv40_fifo_load_context(drm_device_t *, int channel);
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extern int nv40_fifo_save_context(drm_device_t *, int channel);
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/* nv50_fifo.c */
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extern int nv50_fifo_init(drm_device_t *);
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extern void nv50_fifo_takedown(drm_device_t *);
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extern int nv50_fifo_create_context(drm_device_t *, int channel);
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extern void nv50_fifo_destroy_context(drm_device_t *, int channel);
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extern int nv50_fifo_load_context(drm_device_t *, int channel);
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extern int nv50_fifo_save_context(drm_device_t *, int channel);
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/* nv04_graph.c */
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extern void nouveau_nv04_context_switch(drm_device_t *dev);
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extern int nv04_graph_init(drm_device_t *dev);
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@ -338,6 +346,14 @@ extern void nv40_graph_destroy_context(drm_device_t *, int channel);
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extern int nv40_graph_load_context(drm_device_t *, int channel);
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extern int nv40_graph_save_context(drm_device_t *, int channel);
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/* nv50_graph.c */
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extern int nv50_graph_init(drm_device_t *);
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extern void nv50_graph_takedown(drm_device_t *);
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extern int nv50_graph_create_context(drm_device_t *, int channel);
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extern void nv50_graph_destroy_context(drm_device_t *, int channel);
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extern int nv50_graph_load_context(drm_device_t *, int channel);
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extern int nv50_graph_save_context(drm_device_t *, int channel);
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/* nv04_mc.c */
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extern int nv04_mc_init(drm_device_t *dev);
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extern void nv04_mc_takedown(drm_device_t *dev);
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@ -346,6 +362,10 @@ extern void nv04_mc_takedown(drm_device_t *dev);
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extern int nv40_mc_init(drm_device_t *dev);
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extern void nv40_mc_takedown(drm_device_t *dev);
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/* nv50_mc.c */
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extern int nv50_mc_init(drm_device_t *dev);
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extern void nv50_mc_takedown(drm_device_t *dev);
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/* nv04_timer.c */
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extern int nv04_timer_init(drm_device_t *dev);
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extern void nv04_timer_takedown(drm_device_t *dev);
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@ -72,6 +72,7 @@ static int nouveau_init_card_mappings(drm_device_t *dev)
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return 0;
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}
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static int nouveau_stub_init(drm_device_t *dev) { return 0; }
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static void nouveau_stub_takedown(drm_device_t *dev) {}
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static int nouveau_init_engine_ptrs(drm_device_t *dev)
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{
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@ -187,6 +188,26 @@ static int nouveau_init_engine_ptrs(drm_device_t *dev)
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engine->fifo.save_context = nv40_fifo_save_context;
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break;
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case 0x50:
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case 0x80: /* gotta love NVIDIA's consistency.. */
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engine->mc.init = nv50_mc_init;
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engine->mc.takedown = nv50_mc_takedown;
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engine->timer.init = nouveau_stub_init;
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engine->timer.takedown = nouveau_stub_takedown;
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engine->fb.init = nouveau_stub_init;
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engine->fb.takedown = nouveau_stub_takedown;
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engine->graph.init = nv50_graph_init;
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engine->graph.takedown = nv50_graph_takedown;
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engine->graph.create_context = nv50_graph_create_context;
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engine->graph.destroy_context = nv50_graph_destroy_context;
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engine->graph.load_context = nv50_graph_load_context;
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engine->graph.save_context = nv50_graph_save_context;
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engine->fifo.init = nv50_fifo_init;
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engine->fifo.takedown = nv50_fifo_takedown;
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engine->fifo.create_context = nv50_fifo_create_context;
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engine->fifo.destroy_context = nv50_fifo_destroy_context;
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engine->fifo.load_context = nv50_fifo_load_context;
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engine->fifo.save_context = nv50_fifo_save_context;
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break;
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default:
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DRM_ERROR("NV%02x unsupported\n", dev_priv->chipset);
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return 1;
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@ -0,0 +1,83 @@
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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static void
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nv50_fifo_init_reset(drm_device_t *dev)
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{
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drm_nouveau_private_t *dev_priv = dev->dev_private;
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uint32_t pmc_e;
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pmc_e = NV_READ(NV03_PMC_ENABLE);
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NV_WRITE(NV03_PMC_ENABLE, pmc_e & ~NV_PMC_ENABLE_PFIFO);
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pmc_e = NV_READ(NV03_PMC_ENABLE);
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NV_WRITE(NV03_PMC_ENABLE, pmc_e | NV_PMC_ENABLE_PFIFO);
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}
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int
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nv50_fifo_init(drm_device_t *dev)
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{
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nv50_fifo_init_reset(dev);
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DRM_ERROR("stub!\n");
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return 0;
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}
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void
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nv50_fifo_takedown(drm_device_t *dev)
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{
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DRM_ERROR("stub!\n");
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}
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int
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nv50_fifo_create_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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void
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nv50_fifo_destroy_context(drm_device_t *dev, int channel)
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{
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}
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int
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nv50_fifo_load_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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int
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nv50_fifo_save_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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@ -0,0 +1,84 @@
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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static void
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nv50_graph_init_reset(drm_device_t *dev)
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{
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drm_nouveau_private_t *dev_priv = dev->dev_private;
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uint32_t pmc_e;
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pmc_e = NV_READ(NV03_PMC_ENABLE);
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NV_WRITE(NV03_PMC_ENABLE, pmc_e & ~NV_PMC_ENABLE_PGRAPH);
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pmc_e = NV_READ(NV03_PMC_ENABLE);
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NV_WRITE(NV03_PMC_ENABLE, pmc_e | NV_PMC_ENABLE_PGRAPH);
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}
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int
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nv50_graph_init(drm_device_t *dev)
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{
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nv50_graph_init_reset(dev);
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DRM_ERROR("stub!\n");
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return 0;
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}
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void
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nv50_graph_takedown(drm_device_t *dev)
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{
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DRM_ERROR("stub!\n");
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}
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int
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nv50_graph_create_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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void
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nv50_graph_destroy_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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}
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int
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nv50_graph_load_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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int
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nv50_graph_save_context(drm_device_t *dev, int channel)
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{
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DRM_ERROR("stub!\n");
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return 0;
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}
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@ -0,0 +1,42 @@
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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||||
* next paragraph) shall be included in all copies or substantial
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||||
* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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int
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nv50_mc_init(drm_device_t *dev)
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{
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drm_nouveau_private_t *dev_priv = dev->dev_private;
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NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
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return 0;
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}
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void nv50_mc_takedown(drm_device_t *dev)
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{
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}
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