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hopefully fix server recycling on PCIE

main
Dave Airlie 2005-09-25 08:54:31 +00:00
parent c1b7df95be
commit d4dec1db80
1 changed files with 9 additions and 3 deletions
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12
shared-core/radeon_cp.c
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@ -1258,14 +1258,14 @@ static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, RADEON_PCIE_TX_GART_EN);
} else {
RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN);
RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, (tmp & ~RADEON_PCIE_TX_GART_EN) | RADEON_PCIE_TX_GART_INVALIDATE_TLB);
}
}
/* Enable or disable PCI GART on the chip */
static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
{
u32 tmp = RADEON_READ(RADEON_AIC_CNTL);
u32 tmp;
if (dev_priv->flags & CHIP_IS_PCIE)
{
@ -1273,6 +1273,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
return;
}
tmp = RADEON_READ(RADEON_AIC_CNTL);
if (on) {
RADEON_WRITE(RADEON_AIC_CNTL,
tmp | RADEON_PCIGART_TRANSLATE_EN);
@ -1596,9 +1598,13 @@ static int radeon_do_cleanup_cp(drm_device_t * dev)
} else
#endif
{
if (dev_priv->gart_info.bus_addr)
if (dev_priv->gart_info.bus_addr) {
/* Turn off PCI GART */
radeon_set_pcigart(dev_priv, 0);
if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
DRM_ERROR("failed to cleanup PCI GART!\n");
}
if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
{