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Restore pipeconf regs unconditionally 

On many chipsets, the checks for DPLL enable or VGA mode will prevent the
pipeconf regs from being restored, which could result in a blank display or X
failing to come back after resume.  So restore them unconditionally along with
actually restoring pipe B's palette correctly.
main
Jesse Barnes 2008-02-07 17:33:28 -08:00
parent 6f19473191
commit d63b57749f
1 changed files with 4 additions and 7 deletions
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11
linux-core/i915_drv.c
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@ -434,9 +434,7 @@ static int i915_resume(struct drm_device *dev)
I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF); I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
} }
if ((dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) && I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
(dev_priv->saveDPLL_A & DPLL_VGA_MODE_DIS))
I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
i915_restore_palette(dev, PIPE_A); i915_restore_palette(dev, PIPE_A);
/* Enable the plane */ /* Enable the plane */
@ -478,10 +476,9 @@ static int i915_resume(struct drm_device *dev)
I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF); I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
} }
if ((dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) && I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
(dev_priv->saveDPLL_B & DPLL_VGA_MODE_DIS))
I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF); i915_restore_palette(dev, PIPE_B);
i915_restore_palette(dev, PIPE_A);
/* Enable the plane */ /* Enable the plane */
I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR); I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
I915_WRITE(DSPBBASE, I915_READ(DSPBBASE)); I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));