intel: add Ivy Bridge GT2 server variant
We were missing this one and it is being used by Bromolow. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>main
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@ -44,6 +44,7 @@
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#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* mobile */
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#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* mobile */
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#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
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#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
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#define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */
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#define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */
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#define PCI_CHIP_IVYBRIDGE_S_GT2 0x016a /* server */
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#define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */
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#define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */
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#define PCI_CHIP_HASWELL_GT2 0x0412
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#define PCI_CHIP_HASWELL_GT2 0x0412
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@ -128,7 +129,8 @@
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dev == PCI_CHIP_IVYBRIDGE_GT2 || \
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dev == PCI_CHIP_IVYBRIDGE_GT2 || \
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dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
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dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
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dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
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dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
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dev == PCI_CHIP_IVYBRIDGE_S)
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dev == PCI_CHIP_IVYBRIDGE_S || \
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dev == PCI_CHIP_IVYBRIDGE_S_GT2)
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#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
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#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
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devid == PCI_CHIP_HASWELL_M_GT1)
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devid == PCI_CHIP_HASWELL_M_GT1)
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