Remove DRM_DMA_HISTOGRAM and associated code.

main
Eric Anholt 2003-04-24 00:37:35 +00:00
parent 1fc0a5e1e4
commit e21473c888
17 changed files with 0 additions and 577 deletions

View File

@ -58,9 +58,6 @@
#ifndef __HAVE_DMA_FREELIST
#define __HAVE_DMA_FREELIST 0
#endif
#ifndef __HAVE_DMA_HISTOGRAM
#define __HAVE_DMA_HISTOGRAM 0
#endif
#define DRM_DEBUG_CODE 0 /* Include debugging code (if > 1, then
also include looping detection. */
@ -192,39 +189,10 @@ typedef struct drm_buf {
DRM_LIST_RECLAIM = 5
} list; /* Which list we're on */
#if DRM_DMA_HISTOGRAM
cycles_t time_queued; /* Queued to kernel DMA queue */
cycles_t time_dispatched; /* Dispatched to hardware */
cycles_t time_completed; /* Completed by hardware */
cycles_t time_freed; /* Back on freelist */
#endif
int dev_priv_size; /* Size of buffer private stoarge */
void *dev_private; /* Per-buffer private storage */
} drm_buf_t;
#if DRM_DMA_HISTOGRAM
#define DRM_DMA_HISTOGRAM_SLOTS 9
#define DRM_DMA_HISTOGRAM_INITIAL 10
#define DRM_DMA_HISTOGRAM_NEXT(current) ((current)*10)
typedef struct drm_histogram {
atomic_t total;
atomic_t queued_to_dispatched[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dispatched_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t completed_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dma[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t schedule[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t ctx[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t lacq[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t lhld[DRM_DMA_HISTOGRAM_SLOTS];
} drm_histogram_t;
#endif
/* bufs is one longer than it has to be */
typedef struct drm_waitlist {
int count; /* Number of possible buffers */
@ -480,11 +448,6 @@ struct drm_device {
struct drm_vbl_sig_list vbl_sig_list;
DRM_SPINTYPE vbl_lock;
#endif
#endif
cycles_t ctx_start;
cycles_t lck_start;
#if __HAVE_DMA_HISTOGRAM
drm_histogram_t histo;
#endif
#ifdef __FreeBSD__
@ -591,10 +554,6 @@ extern void DRM(driver_irq_uninstall)( drm_device_t *dev );
#if __HAVE_DMA_IRQ_BH
extern void DRM(dma_immediate_bh)( DRM_TASKQUEUE_ARGS );
#endif
#endif
#if DRM_DMA_HISTOGRAM
extern int DRM(histogram_slot)(unsigned long count);
extern void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf);
#endif
/* Buffer list support (drm_lists.h) */

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@ -429,13 +429,6 @@ int DRM(addbufs_agp)( DRM_IOCTL_ARGS )
}
memset( buf->dev_private, 0, buf->dev_priv_size );
#if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
#endif
offset += alignment;
entry->buf_count++;
byte_count += PAGE_SIZE << page_order;
@ -626,12 +619,6 @@ int DRM(addbufs_pci)( DRM_IOCTL_ARGS )
buf->pending = 0;
buf->dma_wait = 0;
buf->filp = NULL;
#if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
#endif
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );
}
@ -794,12 +781,6 @@ int DRM(addbufs_sg)( DRM_IOCTL_ARGS )
memset( buf->dev_private, 0, buf->dev_priv_size );
# if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
# endif
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );

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@ -211,10 +211,6 @@ int DRM(context_switch)( drm_device_t *dev, int old, int new )
return DRM_ERR(EBUSY);
}
#if __HAVE_DMA_HISTOGRAM
dev->ctx_start = get_cycles();
#endif
DRM_DEBUG( "Context switch from %d to %d\n", old, new );
if ( new == dev->last_context ) {
@ -241,11 +237,6 @@ int DRM(context_switch_complete)( drm_device_t *dev, int new )
/* If a context switch is ever initiated
when the kernel holds the lock, release
that lock here. */
#if __HAVE_DMA_HISTOGRAM
atomic_inc( &dev->histo.ctx[DRM(histogram_slot)(get_cycles()
- dev->ctx_start)] );
#endif
clear_bit( 0, &dev->context_flag );
DRM_WAKEUP( (void *)&dev->context_wait );
@ -380,10 +371,6 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new)
return DRM_ERR(EBUSY);
}
#if __HAVE_DMA_HISTOGRAM
dev->ctx_start = get_cycles();
#endif
DRM_DEBUG("Context switch from %d to %d\n", old, new);
if (new >= dev->queue_count) {
@ -431,11 +418,6 @@ int DRM(context_switch_complete)(drm_device_t *dev, int new)
}
}
#if __HAVE_DMA_HISTOGRAM
atomic_inc(&dev->histo.ctx[DRM(histogram_slot)(get_cycles()
- dev->ctx_start)]);
#endif
clear_bit(0, &dev->context_flag);
DRM_WAKEUP_INT(&dev->context_wait);

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@ -120,62 +120,6 @@ void DRM(dma_takedown)(drm_device_t *dev)
}
#if __HAVE_DMA_HISTOGRAM
/* This is slow, but is useful for debugging. */
int DRM(histogram_slot)(unsigned long count)
{
int value = DRM_DMA_HISTOGRAM_INITIAL;
int slot;
for (slot = 0;
slot < DRM_DMA_HISTOGRAM_SLOTS;
++slot, value = DRM_DMA_HISTOGRAM_NEXT(value)) {
if (count < value) return slot;
}
return DRM_DMA_HISTOGRAM_SLOTS - 1;
}
void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf)
{
cycles_t queued_to_dispatched;
cycles_t dispatched_to_completed;
cycles_t completed_to_freed;
int q2d, d2c, c2f, q2c, q2f;
if (buf->time_queued) {
queued_to_dispatched = (buf->time_dispatched
- buf->time_queued);
dispatched_to_completed = (buf->time_completed
- buf->time_dispatched);
completed_to_freed = (buf->time_freed
- buf->time_completed);
q2d = DRM(histogram_slot)(queued_to_dispatched);
d2c = DRM(histogram_slot)(dispatched_to_completed);
c2f = DRM(histogram_slot)(completed_to_freed);
q2c = DRM(histogram_slot)(queued_to_dispatched
+ dispatched_to_completed);
q2f = DRM(histogram_slot)(queued_to_dispatched
+ dispatched_to_completed
+ completed_to_freed);
atomic_inc(&dev->histo.total);
atomic_inc(&dev->histo.queued_to_dispatched[q2d]);
atomic_inc(&dev->histo.dispatched_to_completed[d2c]);
atomic_inc(&dev->histo.completed_to_freed[c2f]);
atomic_inc(&dev->histo.queued_to_completed[q2c]);
atomic_inc(&dev->histo.queued_to_freed[q2f]);
}
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
}
#endif
void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
{
if (!buf) return;
@ -184,9 +128,6 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
buf->pending = 0;
buf->filp = NULL;
buf->used = 0;
#if __HAVE_DMA_HISTOGRAM
buf->time_completed = get_cycles();
#endif
if ( buf->dma_wait ) {
wakeup( (void *)&buf->dma_wait );

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@ -514,9 +514,6 @@ static int DRM(setup)( drm_device_t *dev )
#endif
dev->context_wait = 0;
dev->ctx_start = 0;
dev->lck_start = 0;
#ifdef __FreeBSD__
dev->buf_sigio = NULL;
#elif defined(__NetBSD__)
@ -1122,11 +1119,6 @@ int DRM(lock)( DRM_IOCTL_ARGS )
#if __HAVE_MULTIPLE_DMA_QUEUES
drm_queue_t *q;
#endif
#if __HAVE_DMA_HISTOGRAM
cycles_t start;
dev->lck_start = start = get_cycles();
#endif
DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
@ -1203,10 +1195,6 @@ int DRM(lock)( DRM_IOCTL_ARGS )
DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
#if __HAVE_DMA_HISTOGRAM
atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]);
#endif
return DRM_ERR(ret);
}

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@ -234,7 +234,6 @@ typedef struct drm_chipinfo
typedef unsigned long dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;
typedef u_int32_t u32;
typedef u_int16_t u16;
typedef u_int8_t u8;

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@ -196,7 +196,6 @@ typedef struct drm_chipinfo
typedef u_int32_t dma_addr_t;
typedef volatile long atomic_t;
typedef u_int32_t cycles_t;
typedef u_int32_t u32;
typedef u_int16_t u16;
typedef u_int8_t u8;

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@ -11,9 +11,6 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(queues_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(bufs_info)DRM_SYSCTL_HANDLER_ARGS;
#if DRM_DMA_HISTOGRAM
static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS;
#endif
struct DRM(sysctl_list) {
const char *name;
@ -25,9 +22,6 @@ struct DRM(sysctl_list) {
{ "clients", DRM(clients_info) },
{ "queues", DRM(queues_info) },
{ "bufs", DRM(bufs_info) },
#if DRM_DMA_HISTOGRAM
{ "histo", drm_histo_info) },
#endif
};
#define DRM_SYSCTL_ENTRIES (sizeof(DRM(sysctl_list))/sizeof(DRM(sysctl_list)[0]))
@ -304,134 +298,6 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
}
#if DRM_DMA_HISTOGRAM
static int DRM(_histo_info)DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_device_dma_t *dma = dev->dma;
int i;
unsigned long slot_value = DRM_DMA_HISTOGRAM_INITIAL;
unsigned long prev_value = 0;
drm_buf_t *buffer;
char buf[128];
int error;
DRM_SYSCTL_PRINT("general statistics:\n");
DRM_SYSCTL_PRINT("total %10u\n", atomic_read(&dev->histo.total));
DRM_SYSCTL_PRINT("open %10u\n", atomic_read(&dev->total_open));
DRM_SYSCTL_PRINT("close %10u\n", atomic_read(&dev->total_close));
DRM_SYSCTL_PRINT("ioctl %10u\n", atomic_read(&dev->total_ioctl));
DRM_SYSCTL_PRINT("irq %10u\n", atomic_read(&dev->total_irq));
DRM_SYSCTL_PRINT("ctx %10u\n", atomic_read(&dev->total_ctx));
DRM_SYSCTL_PRINT("\nlock statistics:\n");
DRM_SYSCTL_PRINT("locks %10u\n", atomic_read(&dev->total_locks));
DRM_SYSCTL_PRINT("unlocks %10u\n", atomic_read(&dev->total_unlocks));
DRM_SYSCTL_PRINT("contends %10u\n", atomic_read(&dev->total_contends));
DRM_SYSCTL_PRINT("sleeps %10u\n", atomic_read(&dev->total_sleeps));
if (dma) {
DRM_SYSCTL_PRINT("\ndma statistics:\n");
DRM_SYSCTL_PRINT("prio %10u\n",
atomic_read(&dma->total_prio));
DRM_SYSCTL_PRINT("bytes %10u\n",
atomic_read(&dma->total_bytes));
DRM_SYSCTL_PRINT("dmas %10u\n",
atomic_read(&dma->total_dmas));
DRM_SYSCTL_PRINT("missed:\n");
DRM_SYSCTL_PRINT(" dma %10u\n",
atomic_read(&dma->total_missed_dma));
DRM_SYSCTL_PRINT(" lock %10u\n",
atomic_read(&dma->total_missed_lock));
DRM_SYSCTL_PRINT(" free %10u\n",
atomic_read(&dma->total_missed_free));
DRM_SYSCTL_PRINT(" sched %10u\n",
atomic_read(&dma->total_missed_sched));
DRM_SYSCTL_PRINT("tried %10u\n",
atomic_read(&dma->total_tried));
DRM_SYSCTL_PRINT("hit %10u\n",
atomic_read(&dma->total_hit));
DRM_SYSCTL_PRINT("lost %10u\n",
atomic_read(&dma->total_lost));
buffer = dma->next_buffer;
if (buffer) {
DRM_SYSCTL_PRINT("next_buffer %7d\n", buffer->idx);
} else {
DRM_SYSCTL_PRINT("next_buffer none\n");
}
buffer = dma->this_buffer;
if (buffer) {
DRM_SYSCTL_PRINT("this_buffer %7d\n", buffer->idx);
} else {
DRM_SYSCTL_PRINT("this_buffer none\n");
}
}
DRM_SYSCTL_PRINT("\nvalues:\n");
if (dev->lock.hw_lock) {
DRM_SYSCTL_PRINT("lock 0x%08x\n",
dev->lock.hw_lock->lock);
} else {
DRM_SYSCTL_PRINT("lock none\n");
}
DRM_SYSCTL_PRINT("context_flag 0x%08x\n", dev->context_flag);
DRM_SYSCTL_PRINT("interrupt_flag 0x%08x\n", dev->interrupt_flag);
DRM_SYSCTL_PRINT("dma_flag 0x%08x\n", dev->dma_flag);
DRM_SYSCTL_PRINT("queue_count %10d\n", dev->queue_count);
DRM_SYSCTL_PRINT("last_context %10d\n", dev->last_context);
DRM_SYSCTL_PRINT("last_switch %10u\n", dev->last_switch);
DRM_SYSCTL_PRINT("last_checked %10d\n", dev->last_checked);
DRM_SYSCTL_PRINT("\n q2d d2c c2f"
" q2c q2f dma sch"
" ctx lacq lhld\n\n");
for (i = 0; i < DRM_DMA_HISTOGRAM_SLOTS; i++) {
DRM_SYSCTL_PRINT("%s %10lu %10u %10u %10u %10u %10u"
" %10u %10u %10u %10u %10u\n",
i == DRM_DMA_HISTOGRAM_SLOTS - 1 ? ">=" : "< ",
i == DRM_DMA_HISTOGRAM_SLOTS - 1
? prev_value : slot_value ,
atomic_read(&dev->histo
.queued_to_dispatched[i]),
atomic_read(&dev->histo
.dispatched_to_completed[i]),
atomic_read(&dev->histo
.completed_to_freed[i]),
atomic_read(&dev->histo
.queued_to_completed[i]),
atomic_read(&dev->histo
.queued_to_freed[i]),
atomic_read(&dev->histo.dma[i]),
atomic_read(&dev->histo.schedule[i]),
atomic_read(&dev->histo.ctx[i]),
atomic_read(&dev->histo.lacq[i]),
atomic_read(&dev->histo.lhld[i]));
prev_value = slot_value;
slot_value = DRM_DMA_HISTOGRAM_NEXT(slot_value);
}
SYSCTL_OUT(req, "", 1);
return 0;
}
static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
DRM_LOCK;
ret = _drm_histo_info(oidp, arg1, arg2, req);
DRM_UNLOCK;
return ret;
}
#endif
#elif defined(__NetBSD__)
/* stub it out for now, sysctl is only for debugging */
int DRM(sysctl_init)(drm_device_t *dev)

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@ -58,9 +58,6 @@
#ifndef __HAVE_DMA_FREELIST
#define __HAVE_DMA_FREELIST 0
#endif
#ifndef __HAVE_DMA_HISTOGRAM
#define __HAVE_DMA_HISTOGRAM 0
#endif
#define DRM_DEBUG_CODE 0 /* Include debugging code (if > 1, then
also include looping detection. */
@ -192,39 +189,10 @@ typedef struct drm_buf {
DRM_LIST_RECLAIM = 5
} list; /* Which list we're on */
#if DRM_DMA_HISTOGRAM
cycles_t time_queued; /* Queued to kernel DMA queue */
cycles_t time_dispatched; /* Dispatched to hardware */
cycles_t time_completed; /* Completed by hardware */
cycles_t time_freed; /* Back on freelist */
#endif
int dev_priv_size; /* Size of buffer private stoarge */
void *dev_private; /* Per-buffer private storage */
} drm_buf_t;
#if DRM_DMA_HISTOGRAM
#define DRM_DMA_HISTOGRAM_SLOTS 9
#define DRM_DMA_HISTOGRAM_INITIAL 10
#define DRM_DMA_HISTOGRAM_NEXT(current) ((current)*10)
typedef struct drm_histogram {
atomic_t total;
atomic_t queued_to_dispatched[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dispatched_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t completed_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dma[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t schedule[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t ctx[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t lacq[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t lhld[DRM_DMA_HISTOGRAM_SLOTS];
} drm_histogram_t;
#endif
/* bufs is one longer than it has to be */
typedef struct drm_waitlist {
int count; /* Number of possible buffers */
@ -480,11 +448,6 @@ struct drm_device {
struct drm_vbl_sig_list vbl_sig_list;
DRM_SPINTYPE vbl_lock;
#endif
#endif
cycles_t ctx_start;
cycles_t lck_start;
#if __HAVE_DMA_HISTOGRAM
drm_histogram_t histo;
#endif
#ifdef __FreeBSD__
@ -591,10 +554,6 @@ extern void DRM(driver_irq_uninstall)( drm_device_t *dev );
#if __HAVE_DMA_IRQ_BH
extern void DRM(dma_immediate_bh)( DRM_TASKQUEUE_ARGS );
#endif
#endif
#if DRM_DMA_HISTOGRAM
extern int DRM(histogram_slot)(unsigned long count);
extern void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf);
#endif
/* Buffer list support (drm_lists.h) */

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@ -429,13 +429,6 @@ int DRM(addbufs_agp)( DRM_IOCTL_ARGS )
}
memset( buf->dev_private, 0, buf->dev_priv_size );
#if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
#endif
offset += alignment;
entry->buf_count++;
byte_count += PAGE_SIZE << page_order;
@ -626,12 +619,6 @@ int DRM(addbufs_pci)( DRM_IOCTL_ARGS )
buf->pending = 0;
buf->dma_wait = 0;
buf->filp = NULL;
#if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
#endif
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );
}
@ -794,12 +781,6 @@ int DRM(addbufs_sg)( DRM_IOCTL_ARGS )
memset( buf->dev_private, 0, buf->dev_priv_size );
# if __HAVE_DMA_HISTOGRAM
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
# endif
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );

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@ -211,10 +211,6 @@ int DRM(context_switch)( drm_device_t *dev, int old, int new )
return DRM_ERR(EBUSY);
}
#if __HAVE_DMA_HISTOGRAM
dev->ctx_start = get_cycles();
#endif
DRM_DEBUG( "Context switch from %d to %d\n", old, new );
if ( new == dev->last_context ) {
@ -241,11 +237,6 @@ int DRM(context_switch_complete)( drm_device_t *dev, int new )
/* If a context switch is ever initiated
when the kernel holds the lock, release
that lock here. */
#if __HAVE_DMA_HISTOGRAM
atomic_inc( &dev->histo.ctx[DRM(histogram_slot)(get_cycles()
- dev->ctx_start)] );
#endif
clear_bit( 0, &dev->context_flag );
DRM_WAKEUP( (void *)&dev->context_wait );
@ -380,10 +371,6 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new)
return DRM_ERR(EBUSY);
}
#if __HAVE_DMA_HISTOGRAM
dev->ctx_start = get_cycles();
#endif
DRM_DEBUG("Context switch from %d to %d\n", old, new);
if (new >= dev->queue_count) {
@ -431,11 +418,6 @@ int DRM(context_switch_complete)(drm_device_t *dev, int new)
}
}
#if __HAVE_DMA_HISTOGRAM
atomic_inc(&dev->histo.ctx[DRM(histogram_slot)(get_cycles()
- dev->ctx_start)]);
#endif
clear_bit(0, &dev->context_flag);
DRM_WAKEUP_INT(&dev->context_wait);

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@ -120,62 +120,6 @@ void DRM(dma_takedown)(drm_device_t *dev)
}
#if __HAVE_DMA_HISTOGRAM
/* This is slow, but is useful for debugging. */
int DRM(histogram_slot)(unsigned long count)
{
int value = DRM_DMA_HISTOGRAM_INITIAL;
int slot;
for (slot = 0;
slot < DRM_DMA_HISTOGRAM_SLOTS;
++slot, value = DRM_DMA_HISTOGRAM_NEXT(value)) {
if (count < value) return slot;
}
return DRM_DMA_HISTOGRAM_SLOTS - 1;
}
void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf)
{
cycles_t queued_to_dispatched;
cycles_t dispatched_to_completed;
cycles_t completed_to_freed;
int q2d, d2c, c2f, q2c, q2f;
if (buf->time_queued) {
queued_to_dispatched = (buf->time_dispatched
- buf->time_queued);
dispatched_to_completed = (buf->time_completed
- buf->time_dispatched);
completed_to_freed = (buf->time_freed
- buf->time_completed);
q2d = DRM(histogram_slot)(queued_to_dispatched);
d2c = DRM(histogram_slot)(dispatched_to_completed);
c2f = DRM(histogram_slot)(completed_to_freed);
q2c = DRM(histogram_slot)(queued_to_dispatched
+ dispatched_to_completed);
q2f = DRM(histogram_slot)(queued_to_dispatched
+ dispatched_to_completed
+ completed_to_freed);
atomic_inc(&dev->histo.total);
atomic_inc(&dev->histo.queued_to_dispatched[q2d]);
atomic_inc(&dev->histo.dispatched_to_completed[d2c]);
atomic_inc(&dev->histo.completed_to_freed[c2f]);
atomic_inc(&dev->histo.queued_to_completed[q2c]);
atomic_inc(&dev->histo.queued_to_freed[q2f]);
}
buf->time_queued = 0;
buf->time_dispatched = 0;
buf->time_completed = 0;
buf->time_freed = 0;
}
#endif
void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
{
if (!buf) return;
@ -184,9 +128,6 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
buf->pending = 0;
buf->filp = NULL;
buf->used = 0;
#if __HAVE_DMA_HISTOGRAM
buf->time_completed = get_cycles();
#endif
if ( buf->dma_wait ) {
wakeup( (void *)&buf->dma_wait );

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@ -514,9 +514,6 @@ static int DRM(setup)( drm_device_t *dev )
#endif
dev->context_wait = 0;
dev->ctx_start = 0;
dev->lck_start = 0;
#ifdef __FreeBSD__
dev->buf_sigio = NULL;
#elif defined(__NetBSD__)
@ -1122,11 +1119,6 @@ int DRM(lock)( DRM_IOCTL_ARGS )
#if __HAVE_MULTIPLE_DMA_QUEUES
drm_queue_t *q;
#endif
#if __HAVE_DMA_HISTOGRAM
cycles_t start;
dev->lck_start = start = get_cycles();
#endif
DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
@ -1203,10 +1195,6 @@ int DRM(lock)( DRM_IOCTL_ARGS )
DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
#if __HAVE_DMA_HISTOGRAM
atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]);
#endif
return DRM_ERR(ret);
}

View File

@ -83,9 +83,6 @@ int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf)
buf->idx, buf->pid);
return DRM_ERR( EINVAL );
}
#if __HAVE_DMA_HISTOGRAM
getnanotime(&buf->time_queued);
#endif
buf->list = DRM_LIST_WAIT;
DRM_SPINLOCK(&bl->write_lock);
@ -159,10 +156,6 @@ int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
buf->idx, buf->waiting, buf->pending, buf->list);
}
if (!bl) return 1;
#if __HAVE_DMA_HISTOGRAM
getnanotime(&buf->time_queued);
DRM(histogram_compute)(dev, buf);
#endif
buf->list = DRM_LIST_FREE;
DRM_SPINLOCK( &bl->lock );

View File

@ -234,7 +234,6 @@ typedef struct drm_chipinfo
typedef unsigned long dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;
typedef u_int32_t u32;
typedef u_int16_t u16;
typedef u_int8_t u8;

View File

@ -196,7 +196,6 @@ typedef struct drm_chipinfo
typedef u_int32_t dma_addr_t;
typedef volatile long atomic_t;
typedef u_int32_t cycles_t;
typedef u_int32_t u32;
typedef u_int16_t u16;
typedef u_int8_t u8;

View File

@ -11,9 +11,6 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(queues_info)DRM_SYSCTL_HANDLER_ARGS;
static int DRM(bufs_info)DRM_SYSCTL_HANDLER_ARGS;
#if DRM_DMA_HISTOGRAM
static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS;
#endif
struct DRM(sysctl_list) {
const char *name;
@ -25,9 +22,6 @@ struct DRM(sysctl_list) {
{ "clients", DRM(clients_info) },
{ "queues", DRM(queues_info) },
{ "bufs", DRM(bufs_info) },
#if DRM_DMA_HISTOGRAM
{ "histo", drm_histo_info) },
#endif
};
#define DRM_SYSCTL_ENTRIES (sizeof(DRM(sysctl_list))/sizeof(DRM(sysctl_list)[0]))
@ -304,134 +298,6 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
}
#if DRM_DMA_HISTOGRAM
static int DRM(_histo_info)DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_device_dma_t *dma = dev->dma;
int i;
unsigned long slot_value = DRM_DMA_HISTOGRAM_INITIAL;
unsigned long prev_value = 0;
drm_buf_t *buffer;
char buf[128];
int error;
DRM_SYSCTL_PRINT("general statistics:\n");
DRM_SYSCTL_PRINT("total %10u\n", atomic_read(&dev->histo.total));
DRM_SYSCTL_PRINT("open %10u\n", atomic_read(&dev->total_open));
DRM_SYSCTL_PRINT("close %10u\n", atomic_read(&dev->total_close));
DRM_SYSCTL_PRINT("ioctl %10u\n", atomic_read(&dev->total_ioctl));
DRM_SYSCTL_PRINT("irq %10u\n", atomic_read(&dev->total_irq));
DRM_SYSCTL_PRINT("ctx %10u\n", atomic_read(&dev->total_ctx));
DRM_SYSCTL_PRINT("\nlock statistics:\n");
DRM_SYSCTL_PRINT("locks %10u\n", atomic_read(&dev->total_locks));
DRM_SYSCTL_PRINT("unlocks %10u\n", atomic_read(&dev->total_unlocks));
DRM_SYSCTL_PRINT("contends %10u\n", atomic_read(&dev->total_contends));
DRM_SYSCTL_PRINT("sleeps %10u\n", atomic_read(&dev->total_sleeps));
if (dma) {
DRM_SYSCTL_PRINT("\ndma statistics:\n");
DRM_SYSCTL_PRINT("prio %10u\n",
atomic_read(&dma->total_prio));
DRM_SYSCTL_PRINT("bytes %10u\n",
atomic_read(&dma->total_bytes));
DRM_SYSCTL_PRINT("dmas %10u\n",
atomic_read(&dma->total_dmas));
DRM_SYSCTL_PRINT("missed:\n");
DRM_SYSCTL_PRINT(" dma %10u\n",
atomic_read(&dma->total_missed_dma));
DRM_SYSCTL_PRINT(" lock %10u\n",
atomic_read(&dma->total_missed_lock));
DRM_SYSCTL_PRINT(" free %10u\n",
atomic_read(&dma->total_missed_free));
DRM_SYSCTL_PRINT(" sched %10u\n",
atomic_read(&dma->total_missed_sched));
DRM_SYSCTL_PRINT("tried %10u\n",
atomic_read(&dma->total_tried));
DRM_SYSCTL_PRINT("hit %10u\n",
atomic_read(&dma->total_hit));
DRM_SYSCTL_PRINT("lost %10u\n",
atomic_read(&dma->total_lost));
buffer = dma->next_buffer;
if (buffer) {
DRM_SYSCTL_PRINT("next_buffer %7d\n", buffer->idx);
} else {
DRM_SYSCTL_PRINT("next_buffer none\n");
}
buffer = dma->this_buffer;
if (buffer) {
DRM_SYSCTL_PRINT("this_buffer %7d\n", buffer->idx);
} else {
DRM_SYSCTL_PRINT("this_buffer none\n");
}
}
DRM_SYSCTL_PRINT("\nvalues:\n");
if (dev->lock.hw_lock) {
DRM_SYSCTL_PRINT("lock 0x%08x\n",
dev->lock.hw_lock->lock);
} else {
DRM_SYSCTL_PRINT("lock none\n");
}
DRM_SYSCTL_PRINT("context_flag 0x%08x\n", dev->context_flag);
DRM_SYSCTL_PRINT("interrupt_flag 0x%08x\n", dev->interrupt_flag);
DRM_SYSCTL_PRINT("dma_flag 0x%08x\n", dev->dma_flag);
DRM_SYSCTL_PRINT("queue_count %10d\n", dev->queue_count);
DRM_SYSCTL_PRINT("last_context %10d\n", dev->last_context);
DRM_SYSCTL_PRINT("last_switch %10u\n", dev->last_switch);
DRM_SYSCTL_PRINT("last_checked %10d\n", dev->last_checked);
DRM_SYSCTL_PRINT("\n q2d d2c c2f"
" q2c q2f dma sch"
" ctx lacq lhld\n\n");
for (i = 0; i < DRM_DMA_HISTOGRAM_SLOTS; i++) {
DRM_SYSCTL_PRINT("%s %10lu %10u %10u %10u %10u %10u"
" %10u %10u %10u %10u %10u\n",
i == DRM_DMA_HISTOGRAM_SLOTS - 1 ? ">=" : "< ",
i == DRM_DMA_HISTOGRAM_SLOTS - 1
? prev_value : slot_value ,
atomic_read(&dev->histo
.queued_to_dispatched[i]),
atomic_read(&dev->histo
.dispatched_to_completed[i]),
atomic_read(&dev->histo
.completed_to_freed[i]),
atomic_read(&dev->histo
.queued_to_completed[i]),
atomic_read(&dev->histo
.queued_to_freed[i]),
atomic_read(&dev->histo.dma[i]),
atomic_read(&dev->histo.schedule[i]),
atomic_read(&dev->histo.ctx[i]),
atomic_read(&dev->histo.lacq[i]),
atomic_read(&dev->histo.lhld[i]));
prev_value = slot_value;
slot_value = DRM_DMA_HISTOGRAM_NEXT(slot_value);
}
SYSCTL_OUT(req, "", 1);
return 0;
}
static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
DRM_LOCK;
ret = _drm_histo_info(oidp, arg1, arg2, req);
DRM_UNLOCK;
return ret;
}
#endif
#elif defined(__NetBSD__)
/* stub it out for now, sysctl is only for debugging */
int DRM(sysctl_init)(drm_device_t *dev)