diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index d1fdc4bf..a74064c4 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -159,7 +159,8 @@ static void surf_minify(struct radeon_surface *surf, surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h; surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { surflevel->mode = RADEON_SURF_MODE_1D; return; @@ -565,7 +566,8 @@ static void eg_surf_minify(struct radeon_surface *surf, surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h; surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) { surflevel->mode = RADEON_SURF_MODE_1D; return; @@ -1459,7 +1461,8 @@ static void si_surf_minify_2d(struct radeon_surface *surf, surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; } - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { surflevel->mode = RADEON_SURF_MODE_1D; return; diff --git a/radeon/radeon_surface.h b/radeon/radeon_surface.h index 2babfd71..bbed56f8 100644 --- a/radeon/radeon_surface.h +++ b/radeon/radeon_surface.h @@ -56,6 +56,7 @@ #define RADEON_SURF_SBUFFER (1 << 18) #define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) #define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20) +#define RADEON_SURF_FMASK (1 << 21) #define RADEON_SURF_GET(v, field) (((v) >> RADEON_SURF_ ## field ## _SHIFT) & RADEON_SURF_ ## field ## _MASK) #define RADEON_SURF_SET(v, field) (((v) & RADEON_SURF_ ## field ## _MASK) << RADEON_SURF_ ## field ## _SHIFT)