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intel: Fixup for the fix for relaxed tiling on gen2 

This is Fail.

First patch to libdrm, and I've borked it up.

Noticed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter 2011-02-22 19:11:07 +01:00
parent 9a71ed93f4
commit e6018c25ca
1 changed files with 1 additions and 1 deletions
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2
intel/intel_bufmgr_gem.c
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@ -767,7 +767,7 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
else if (tiling == I915_TILING_Y) else if (tiling == I915_TILING_Y)
height_alignment = 32; height_alignment = 32;
/* i8xx has a interleaved 2-row tile layout */ /* i8xx has a interleaved 2-row tile layout */
if (IS_GEN2(bufmgr_gem)) if (IS_GEN2(bufmgr_gem) && tiling != I915_TILING_NONE)
height_alignment *= 2; height_alignment *= 2;
aligned_y = ALIGN(y, height_alignment); aligned_y = ALIGN(y, height_alignment);