Kernel support for vblank syncing on Rage 128 and Matrox.
Eric Anholt
parent
344c7f6b41
commit
e656655a36
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@ -3,7 +3,7 @@
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.PATH: ${.CURDIR}/..
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KMOD= mga
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NOMAN= YES
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SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c
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SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c mga_irq.c
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SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
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CFLAGS+= ${DEBUG_FLAGS} -I. -I..
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@ -3,7 +3,7 @@
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.PATH: ${.CURDIR}/..
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KMOD = r128
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NOMAN= YES
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SRCS = r128_cce.c r128_drv.c r128_state.c
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SRCS = r128_cce.c r128_drv.c r128_state.c r128_irq.c
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SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
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CFLAGS += ${DEBUG_FLAGS} -I. -I..
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@ -24,6 +24,7 @@ LinkSourceFile(mga.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_dma.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_drm.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_drv.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_irq.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_state.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_ucode.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(mga_warp.c,$(XF86OSSRC)/shared/drm/kernel)
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@ -31,6 +32,7 @@ LinkSourceFile(r128.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(r128_cce.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(r128_drm.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(r128_drv.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(r128_irq.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(r128_state.c,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(radeon.h,$(XF86OSSRC)/shared/drm/kernel)
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LinkSourceFile(radeon_cp.c,$(XF86OSSRC)/shared/drm/kernel)
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@ -3,7 +3,7 @@
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.PATH: ${.CURDIR}/..
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KMOD= mga
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NOMAN= YES
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SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c
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SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c mga_irq.c
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SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
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CFLAGS+= ${DEBUG_FLAGS} -I. -I..
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@ -3,7 +3,7 @@
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.PATH: ${.CURDIR}/..
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KMOD = r128
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NOMAN= YES
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SRCS = r128_cce.c r128_drv.c r128_state.c
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SRCS = r128_cce.c r128_drv.c r128_state.c r128_irq.c
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SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
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CFLAGS += ${DEBUG_FLAGS} -I. -I..
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@ -52,7 +52,7 @@ GAMMAHEADERS = gamma_drv.h $(DRMHEADERS) $(DRMTEMPLATES)
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TDFXOBJS = tdfx_drv.o
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TDFXHEADERS = tdfx.h $(DRMHEADERS) $(DRMTEMPLATES)
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R128OBJS = r128_drv.o r128_cce.o r128_state.o
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R128OBJS = r128_drv.o r128_cce.o r128_state.o r128_irq.o
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R128HEADERS = r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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RADEONOBJS = radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o
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@ -158,7 +158,7 @@ MODS += i810.o
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MODS += i830.o
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endif
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MGAOBJS = mga_drv.o mga_dma.o mga_state.o mga_warp.o
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MGAOBJS = mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
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MGAHEADERS = mga.h mga_drv.h mga_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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I810OBJS = i810_drv.o i810_dma.o
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@ -239,6 +239,7 @@ typedef struct _drm_mga_sarea {
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#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
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#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
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#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
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#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(0x49, drm_mga_getparam_t)
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typedef struct _drm_mga_warp_index {
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int installed;
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@ -322,4 +323,14 @@ typedef struct _drm_mga_blit {
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int source_pitch, dest_pitch;
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} drm_mga_blit_t;
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/* 3.1: An ioctl to get parameters that aren't available to the 3d
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* client any other way.
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*/
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#define MGA_PARAM_IRQ_NR 1
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typedef struct drm_mga_getparam {
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int param;
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int *value;
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} drm_mga_getparam_t;
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#endif
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@ -125,6 +125,7 @@ extern int mga_dma_vertex( DRM_IOCTL_ARGS );
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extern int mga_dma_indices( DRM_IOCTL_ARGS );
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extern int mga_dma_iload( DRM_IOCTL_ARGS );
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extern int mga_dma_blit( DRM_IOCTL_ARGS );
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extern int mga_getparam( DRM_IOCTL_ARGS );
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/* mga_warp.c */
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extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
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@ -141,6 +142,7 @@ extern int mga_warp_init( drm_mga_private_t *dev_priv );
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#ifdef __alpha__
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#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
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#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
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#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
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#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
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@ -152,6 +154,7 @@ static inline u32 _MGA_READ(u32 *addr)
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#else
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#define MGA_READ( reg ) MGA_DEREF( reg )
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#define MGA_READ8( reg ) MGA_DEREF8( reg )
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#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
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#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0)
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#endif
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@ -345,6 +348,11 @@ do { \
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/* A reduced set of the mga registers.
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*/
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#define MGA_CRTC_INDEX 0x1fd4
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#define MGA_CRTC_DATA 0x1fd5
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/* CRTC11 */
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#define MGA_VINTCLR (1 << 4)
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#define MGA_VINTEN (1 << 5)
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#define MGA_ALPHACTRL 0x2c7c
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#define MGA_AR0 0x1c60
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@ -416,8 +424,10 @@ do { \
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#define MGA_ICLEAR 0x1e18
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# define MGA_SOFTRAPICLR (1 << 0)
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# define MGA_VLINEICLR (1 << 5)
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#define MGA_IEN 0x1e1c
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# define MGA_SOFTRAPIEN (1 << 0)
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# define MGA_VLINEIEN (1 << 5)
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#define MGA_LEN 0x1c5c
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@ -456,6 +466,8 @@ do { \
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# define MGA_SRCACC_AGP (1 << 1)
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#define MGA_STATUS 0x1e14
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# define MGA_SOFTRAPEN (1 << 0)
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# define MGA_VSYNCPEN (1 << 4)
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# define MGA_VLINEPEN (1 << 5)
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# define MGA_DWGENGSTS (1 << 16)
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# define MGA_ENDPRDMASTS (1 << 17)
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#define MGA_STENCIL 0x2cc8
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@ -0,0 +1,99 @@
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/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
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*
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* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
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*
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* The Weather Channel (TM) funded Tungsten Graphics to develop the
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* initial release of the Radeon 8500 driver under the XFree86 license.
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* This notice must be preserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* Eric Anholt <anholt@FreeBSD.org>
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*/
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#include "mga.h"
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#include "drmP.h"
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#include "drm.h"
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#include "mga_drm.h"
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#include "mga_drv.h"
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void mga_dma_service( DRM_IRQ_ARGS )
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{
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drm_device_t *dev = (drm_device_t *) arg;
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drm_mga_private_t *dev_priv =
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(drm_mga_private_t *)dev->dev_private;
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int status;
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status = MGA_READ( MGA_STATUS );
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/* VBLANK interrupt */
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if ( status & MGA_VLINEPEN ) {
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MGA_WRITE( MGA_ICLEAR, MGA_VLINEICLR );
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atomic_inc(&dev->vbl_received);
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DRM_WAKEUP(&dev->vbl_queue);
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}
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}
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int mga_vblank_wait(drm_device_t *dev, unsigned int *sequence)
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{
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unsigned int cur_vblank;
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int ret = 0;
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/* Assume that the user has missed the current sequence number
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* by about a day rather than she wants to wait for years
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* using vertical blanks...
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*/
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DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
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( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
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+ ~*sequence + 1 ) <= (1<<23) ) );
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*sequence = cur_vblank;
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return ret;
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}
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void mga_driver_irq_preinstall( drm_device_t *dev ) {
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drm_mga_private_t *dev_priv =
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(drm_mga_private_t *)dev->dev_private;
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/* Disable *all* interrupts */
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MGA_WRITE( MGA_IEN, 0 );
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/* Clear bits if they're already high */
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MGA_WRITE( MGA_ICLEAR, ~0 );
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}
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void mga_driver_irq_postinstall( drm_device_t *dev ) {
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drm_mga_private_t *dev_priv =
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(drm_mga_private_t *)dev->dev_private;
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/* Turn on VBL interrupt */
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MGA_WRITE( MGA_IEN, MGA_VLINEIEN );
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}
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void mga_driver_irq_uninstall( drm_device_t *dev ) {
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drm_mga_private_t *dev_priv =
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(drm_mga_private_t *)dev->dev_private;
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if ( dev_priv ) {
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/* Disable *all* interrupts */
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MGA_WRITE( MGA_IEN, 0 );
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}
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}
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@ -1075,3 +1075,36 @@ int mga_dma_blit( DRM_IOCTL_ARGS )
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return 0;
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}
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int mga_getparam( DRM_IOCTL_ARGS )
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{
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DRM_DEVICE;
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_getparam_t param;
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int value;
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if ( !dev_priv ) {
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DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
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return DRM_ERR(EINVAL);
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}
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DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t *)data,
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sizeof(param) );
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DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
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switch( param.param ) {
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case MGA_PARAM_IRQ_NR:
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value = dev->irq;
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break;
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default:
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return DRM_ERR(EINVAL);
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}
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if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
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DRM_ERROR( "copy_to_user\n" );
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return DRM_ERR(EFAULT);
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}
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return 0;
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}
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@ -190,6 +190,7 @@ typedef struct drm_r128_sarea {
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#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
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#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
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#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t)
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#define DRM_IOCTL_R128_GETPARAM DRM_IOW( 0x52, drm_r128_getparam_t)
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typedef struct drm_r128_init {
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enum {
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@ -305,4 +306,14 @@ typedef struct drm_r128_fullscreen {
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} func;
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} drm_r128_fullscreen_t;
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/* 2.3: An ioctl to get parameters that aren't available to the 3d
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* client any other way.
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*/
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#define R128_PARAM_IRQ_NR 1
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typedef struct drm_r128_getparam {
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int param;
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int *value;
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} drm_r128_getparam_t;
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#endif
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@ -124,6 +124,7 @@ extern int r128_cce_idle( DRM_IOCTL_ARGS );
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extern int r128_engine_reset( DRM_IOCTL_ARGS );
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extern int r128_fullscreen( DRM_IOCTL_ARGS );
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extern int r128_cce_buffers( DRM_IOCTL_ARGS );
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extern int r128_getparam( DRM_IOCTL_ARGS );
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extern void r128_freelist_reset( drm_device_t *dev );
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extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
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@ -213,6 +214,11 @@ extern int r128_cce_indirect( DRM_IOCTL_ARGS );
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#define R128_DST_PITCH_OFFSET_C 0x1c80
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# define R128_DST_TILE (1 << 31)
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#define R128_GEN_INT_CNTL 0x0040
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# define R128_CRTC_VBLANK_INT_EN (1 << 0)
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#define R128_GEN_INT_STATUS 0x0044
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# define R128_CRTC_VBLANK_INT (1 << 0)
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# define R128_CRTC_VBLANK_INT_AK (1 << 0)
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#define R128_GEN_RESET_CNTL 0x00f0
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# define R128_SOFT_RESET_GUI (1 << 0)
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@ -0,0 +1,99 @@
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/* r128_irq.c -- IRQ handling for radeon -*- linux-c -*-
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*
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* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
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*
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* The Weather Channel (TM) funded Tungsten Graphics to develop the
|
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* initial release of the Radeon 8500 driver under the XFree86 license.
|
||||
* This notice must be preserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
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* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
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*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
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* Software.
|
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*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* Eric Anholt <anholt@FreeBSD.org>
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*/
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#include "r128.h"
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#include "drmP.h"
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#include "drm.h"
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#include "r128_drm.h"
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#include "r128_drv.h"
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void r128_dma_service( DRM_IRQ_ARGS )
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{
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drm_device_t *dev = (drm_device_t *) arg;
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drm_r128_private_t *dev_priv =
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(drm_r128_private_t *)dev->dev_private;
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int status;
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status = R128_READ( R128_GEN_INT_STATUS );
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/* VBLANK interrupt */
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if ( status & R128_CRTC_VBLANK_INT ) {
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||||
R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
|
||||
atomic_inc(&dev->vbl_received);
|
||||
DRM_WAKEUP(&dev->vbl_queue);
|
||||
}
|
||||
}
|
||||
|
||||
int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
|
||||
{
|
||||
unsigned int cur_vblank;
|
||||
int ret = 0;
|
||||
|
||||
/* Assume that the user has missed the current sequence number
|
||||
* by about a day rather than she wants to wait for years
|
||||
* using vertical blanks...
|
||||
*/
|
||||
DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
|
||||
( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
|
||||
+ ~*sequence + 1 ) <= (1<<23) ) );
|
||||
|
||||
*sequence = cur_vblank;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void r128_driver_irq_preinstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
|
||||
/* Disable *all* interrupts */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, 0 );
|
||||
/* Clear vblank bit if it's already high */
|
||||
R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
|
||||
}
|
||||
|
||||
void r128_driver_irq_postinstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
|
||||
/* Turn on VBL interrupt */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN );
|
||||
}
|
||||
|
||||
void r128_driver_irq_uninstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
if ( dev_priv ) {
|
||||
/* Disable *all* interrupts */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, 0 );
|
||||
}
|
||||
}
|
||||
|
|
@ -1564,3 +1564,36 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int r128_getparam( DRM_IOCTL_ARGS )
|
||||
{
|
||||
DRM_DEVICE;
|
||||
drm_r128_private_t *dev_priv = dev->dev_private;
|
||||
drm_r128_getparam_t param;
|
||||
int value;
|
||||
|
||||
if ( !dev_priv ) {
|
||||
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
DRM_COPY_FROM_USER_IOCTL( param, (drm_r128_getparam_t *)data,
|
||||
sizeof(param) );
|
||||
|
||||
DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
|
||||
|
||||
switch( param.param ) {
|
||||
case R128_PARAM_IRQ_NR:
|
||||
value = dev->irq;
|
||||
break;
|
||||
default:
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
|
||||
DRM_ERROR( "copy_to_user\n" );
|
||||
return DRM_ERR(EFAULT);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
12
shared/mga.h
12
shared/mga.h
|
|
@ -45,11 +45,11 @@
|
|||
|
||||
#define DRIVER_NAME "mga"
|
||||
#define DRIVER_DESC "Matrox G200/G400"
|
||||
#define DRIVER_DATE "20010321"
|
||||
#define DRIVER_DATE "20021029"
|
||||
|
||||
#define DRIVER_MAJOR 3
|
||||
#define DRIVER_MINOR 0
|
||||
#define DRIVER_PATCHLEVEL 2
|
||||
#define DRIVER_MINOR 1
|
||||
#define DRIVER_PATCHLEVEL 0
|
||||
|
||||
#define DRIVER_IOCTLS \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
|
||||
|
|
@ -61,7 +61,8 @@
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_GETPARAM)]= { mga_getparam, 1, 0 },
|
||||
|
||||
#define __HAVE_COUNTERS 3
|
||||
#define __HAVE_COUNTER6 _DRM_STAT_IRQ
|
||||
|
|
@ -77,6 +78,9 @@
|
|||
/* DMA customization:
|
||||
*/
|
||||
#define __HAVE_DMA 1
|
||||
#define __HAVE_DMA_IRQ 1
|
||||
#define __HAVE_VBL_IRQ 1
|
||||
#define __HAVE_SHARED_IRQ 1
|
||||
|
||||
#define __HAVE_DMA_QUIESCENT 1
|
||||
#define DRIVER_DMA_QUIESCENT() do { \
|
||||
|
|
|
|||
|
|
@ -239,6 +239,7 @@ typedef struct _drm_mga_sarea {
|
|||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
|
||||
#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(0x49, drm_mga_getparam_t)
|
||||
|
||||
typedef struct _drm_mga_warp_index {
|
||||
int installed;
|
||||
|
|
@ -322,4 +323,14 @@ typedef struct _drm_mga_blit {
|
|||
int source_pitch, dest_pitch;
|
||||
} drm_mga_blit_t;
|
||||
|
||||
/* 3.1: An ioctl to get parameters that aren't available to the 3d
|
||||
* client any other way.
|
||||
*/
|
||||
#define MGA_PARAM_IRQ_NR 1
|
||||
|
||||
typedef struct drm_mga_getparam {
|
||||
int param;
|
||||
int *value;
|
||||
} drm_mga_getparam_t;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -125,6 +125,7 @@ extern int mga_dma_vertex( DRM_IOCTL_ARGS );
|
|||
extern int mga_dma_indices( DRM_IOCTL_ARGS );
|
||||
extern int mga_dma_iload( DRM_IOCTL_ARGS );
|
||||
extern int mga_dma_blit( DRM_IOCTL_ARGS );
|
||||
extern int mga_getparam( DRM_IOCTL_ARGS );
|
||||
|
||||
/* mga_warp.c */
|
||||
extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
|
||||
|
|
@ -141,6 +142,7 @@ extern int mga_warp_init( drm_mga_private_t *dev_priv );
|
|||
|
||||
#ifdef __alpha__
|
||||
#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
|
||||
#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
|
||||
#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
|
||||
#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
|
||||
|
||||
|
|
@ -152,6 +154,7 @@ static inline u32 _MGA_READ(u32 *addr)
|
|||
|
||||
#else
|
||||
#define MGA_READ( reg ) MGA_DEREF( reg )
|
||||
#define MGA_READ8( reg ) MGA_DEREF8( reg )
|
||||
#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
|
||||
#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0)
|
||||
#endif
|
||||
|
|
@ -345,6 +348,11 @@ do { \
|
|||
/* A reduced set of the mga registers.
|
||||
*/
|
||||
#define MGA_CRTC_INDEX 0x1fd4
|
||||
#define MGA_CRTC_DATA 0x1fd5
|
||||
|
||||
/* CRTC11 */
|
||||
#define MGA_VINTCLR (1 << 4)
|
||||
#define MGA_VINTEN (1 << 5)
|
||||
|
||||
#define MGA_ALPHACTRL 0x2c7c
|
||||
#define MGA_AR0 0x1c60
|
||||
|
|
@ -416,8 +424,10 @@ do { \
|
|||
|
||||
#define MGA_ICLEAR 0x1e18
|
||||
# define MGA_SOFTRAPICLR (1 << 0)
|
||||
# define MGA_VLINEICLR (1 << 5)
|
||||
#define MGA_IEN 0x1e1c
|
||||
# define MGA_SOFTRAPIEN (1 << 0)
|
||||
# define MGA_VLINEIEN (1 << 5)
|
||||
|
||||
#define MGA_LEN 0x1c5c
|
||||
|
||||
|
|
@ -456,6 +466,8 @@ do { \
|
|||
# define MGA_SRCACC_AGP (1 << 1)
|
||||
#define MGA_STATUS 0x1e14
|
||||
# define MGA_SOFTRAPEN (1 << 0)
|
||||
# define MGA_VSYNCPEN (1 << 4)
|
||||
# define MGA_VLINEPEN (1 << 5)
|
||||
# define MGA_DWGENGSTS (1 << 16)
|
||||
# define MGA_ENDPRDMASTS (1 << 17)
|
||||
#define MGA_STENCIL 0x2cc8
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
|
||||
*
|
||||
* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
|
||||
*
|
||||
* The Weather Channel (TM) funded Tungsten Graphics to develop the
|
||||
* initial release of the Radeon 8500 driver under the XFree86 license.
|
||||
* This notice must be preserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Keith Whitwell <keith@tungstengraphics.com>
|
||||
* Eric Anholt <anholt@FreeBSD.org>
|
||||
*/
|
||||
|
||||
#include "mga.h"
|
||||
#include "drmP.h"
|
||||
#include "drm.h"
|
||||
#include "mga_drm.h"
|
||||
#include "mga_drv.h"
|
||||
|
||||
void mga_dma_service( DRM_IRQ_ARGS )
|
||||
{
|
||||
drm_device_t *dev = (drm_device_t *) arg;
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *)dev->dev_private;
|
||||
int status;
|
||||
|
||||
status = MGA_READ( MGA_STATUS );
|
||||
|
||||
/* VBLANK interrupt */
|
||||
if ( status & MGA_VLINEPEN ) {
|
||||
MGA_WRITE( MGA_ICLEAR, MGA_VLINEICLR );
|
||||
atomic_inc(&dev->vbl_received);
|
||||
DRM_WAKEUP(&dev->vbl_queue);
|
||||
}
|
||||
}
|
||||
|
||||
int mga_vblank_wait(drm_device_t *dev, unsigned int *sequence)
|
||||
{
|
||||
unsigned int cur_vblank;
|
||||
int ret = 0;
|
||||
|
||||
/* Assume that the user has missed the current sequence number
|
||||
* by about a day rather than she wants to wait for years
|
||||
* using vertical blanks...
|
||||
*/
|
||||
DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
|
||||
( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
|
||||
+ ~*sequence + 1 ) <= (1<<23) ) );
|
||||
|
||||
*sequence = cur_vblank;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void mga_driver_irq_preinstall( drm_device_t *dev ) {
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *)dev->dev_private;
|
||||
|
||||
/* Disable *all* interrupts */
|
||||
MGA_WRITE( MGA_IEN, 0 );
|
||||
/* Clear bits if they're already high */
|
||||
MGA_WRITE( MGA_ICLEAR, ~0 );
|
||||
}
|
||||
|
||||
void mga_driver_irq_postinstall( drm_device_t *dev ) {
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *)dev->dev_private;
|
||||
|
||||
/* Turn on VBL interrupt */
|
||||
MGA_WRITE( MGA_IEN, MGA_VLINEIEN );
|
||||
}
|
||||
|
||||
void mga_driver_irq_uninstall( drm_device_t *dev ) {
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *)dev->dev_private;
|
||||
if ( dev_priv ) {
|
||||
/* Disable *all* interrupts */
|
||||
MGA_WRITE( MGA_IEN, 0 );
|
||||
}
|
||||
}
|
||||
|
|
@ -1075,3 +1075,36 @@ int mga_dma_blit( DRM_IOCTL_ARGS )
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mga_getparam( DRM_IOCTL_ARGS )
|
||||
{
|
||||
DRM_DEVICE;
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_getparam_t param;
|
||||
int value;
|
||||
|
||||
if ( !dev_priv ) {
|
||||
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t *)data,
|
||||
sizeof(param) );
|
||||
|
||||
DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
|
||||
|
||||
switch( param.param ) {
|
||||
case MGA_PARAM_IRQ_NR:
|
||||
value = dev->irq;
|
||||
break;
|
||||
default:
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
|
||||
DRM_ERROR( "copy_to_user\n" );
|
||||
return DRM_ERR(EFAULT);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -47,10 +47,10 @@
|
|||
|
||||
#define DRIVER_NAME "r128"
|
||||
#define DRIVER_DESC "ATI Rage 128"
|
||||
#define DRIVER_DATE "20010917"
|
||||
#define DRIVER_DATE "20021029"
|
||||
|
||||
#define DRIVER_MAJOR 2
|
||||
#define DRIVER_MINOR 2
|
||||
#define DRIVER_MINOR 3
|
||||
#define DRIVER_PATCHLEVEL 0
|
||||
|
||||
|
||||
|
|
@ -70,7 +70,8 @@
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, \
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_R128_GETPARAM)] = { r128_getparam, 1, 1 },
|
||||
|
||||
/* Driver customization:
|
||||
*/
|
||||
|
|
@ -90,6 +91,9 @@
|
|||
/* DMA customization:
|
||||
*/
|
||||
#define __HAVE_DMA 1
|
||||
#define __HAVE_DMA_IRQ 1
|
||||
#define __HAVE_VBL_IRQ 1
|
||||
#define __HAVE_SHARED_IRQ 1
|
||||
|
||||
#if 0
|
||||
/* GH: Remove this for now... */
|
||||
|
|
|
|||
|
|
@ -190,6 +190,7 @@ typedef struct drm_r128_sarea {
|
|||
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
|
||||
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
|
||||
#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t)
|
||||
#define DRM_IOCTL_R128_GETPARAM DRM_IOW( 0x52, drm_r128_getparam_t)
|
||||
|
||||
typedef struct drm_r128_init {
|
||||
enum {
|
||||
|
|
@ -305,4 +306,14 @@ typedef struct drm_r128_fullscreen {
|
|||
} func;
|
||||
} drm_r128_fullscreen_t;
|
||||
|
||||
/* 2.3: An ioctl to get parameters that aren't available to the 3d
|
||||
* client any other way.
|
||||
*/
|
||||
#define R128_PARAM_IRQ_NR 1
|
||||
|
||||
typedef struct drm_r128_getparam {
|
||||
int param;
|
||||
int *value;
|
||||
} drm_r128_getparam_t;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -124,6 +124,7 @@ extern int r128_cce_idle( DRM_IOCTL_ARGS );
|
|||
extern int r128_engine_reset( DRM_IOCTL_ARGS );
|
||||
extern int r128_fullscreen( DRM_IOCTL_ARGS );
|
||||
extern int r128_cce_buffers( DRM_IOCTL_ARGS );
|
||||
extern int r128_getparam( DRM_IOCTL_ARGS );
|
||||
|
||||
extern void r128_freelist_reset( drm_device_t *dev );
|
||||
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
|
||||
|
|
@ -213,6 +214,11 @@ extern int r128_cce_indirect( DRM_IOCTL_ARGS );
|
|||
#define R128_DST_PITCH_OFFSET_C 0x1c80
|
||||
# define R128_DST_TILE (1 << 31)
|
||||
|
||||
#define R128_GEN_INT_CNTL 0x0040
|
||||
# define R128_CRTC_VBLANK_INT_EN (1 << 0)
|
||||
#define R128_GEN_INT_STATUS 0x0044
|
||||
# define R128_CRTC_VBLANK_INT (1 << 0)
|
||||
# define R128_CRTC_VBLANK_INT_AK (1 << 0)
|
||||
#define R128_GEN_RESET_CNTL 0x00f0
|
||||
# define R128_SOFT_RESET_GUI (1 << 0)
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
/* r128_irq.c -- IRQ handling for radeon -*- linux-c -*-
|
||||
*
|
||||
* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
|
||||
*
|
||||
* The Weather Channel (TM) funded Tungsten Graphics to develop the
|
||||
* initial release of the Radeon 8500 driver under the XFree86 license.
|
||||
* This notice must be preserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Keith Whitwell <keith@tungstengraphics.com>
|
||||
* Eric Anholt <anholt@FreeBSD.org>
|
||||
*/
|
||||
|
||||
#include "r128.h"
|
||||
#include "drmP.h"
|
||||
#include "drm.h"
|
||||
#include "r128_drm.h"
|
||||
#include "r128_drv.h"
|
||||
|
||||
void r128_dma_service( DRM_IRQ_ARGS )
|
||||
{
|
||||
drm_device_t *dev = (drm_device_t *) arg;
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
int status;
|
||||
|
||||
status = R128_READ( R128_GEN_INT_STATUS );
|
||||
|
||||
/* VBLANK interrupt */
|
||||
if ( status & R128_CRTC_VBLANK_INT ) {
|
||||
R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
|
||||
atomic_inc(&dev->vbl_received);
|
||||
DRM_WAKEUP(&dev->vbl_queue);
|
||||
}
|
||||
}
|
||||
|
||||
int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
|
||||
{
|
||||
unsigned int cur_vblank;
|
||||
int ret = 0;
|
||||
|
||||
/* Assume that the user has missed the current sequence number
|
||||
* by about a day rather than she wants to wait for years
|
||||
* using vertical blanks...
|
||||
*/
|
||||
DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ,
|
||||
( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
|
||||
+ ~*sequence + 1 ) <= (1<<23) ) );
|
||||
|
||||
*sequence = cur_vblank;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void r128_driver_irq_preinstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
|
||||
/* Disable *all* interrupts */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, 0 );
|
||||
/* Clear vblank bit if it's already high */
|
||||
R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
|
||||
}
|
||||
|
||||
void r128_driver_irq_postinstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
|
||||
/* Turn on VBL interrupt */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN );
|
||||
}
|
||||
|
||||
void r128_driver_irq_uninstall( drm_device_t *dev ) {
|
||||
drm_r128_private_t *dev_priv =
|
||||
(drm_r128_private_t *)dev->dev_private;
|
||||
if ( dev_priv ) {
|
||||
/* Disable *all* interrupts */
|
||||
R128_WRITE( R128_GEN_INT_CNTL, 0 );
|
||||
}
|
||||
}
|
||||
|
|
@ -1564,3 +1564,36 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int r128_getparam( DRM_IOCTL_ARGS )
|
||||
{
|
||||
DRM_DEVICE;
|
||||
drm_r128_private_t *dev_priv = dev->dev_private;
|
||||
drm_r128_getparam_t param;
|
||||
int value;
|
||||
|
||||
if ( !dev_priv ) {
|
||||
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
DRM_COPY_FROM_USER_IOCTL( param, (drm_r128_getparam_t *)data,
|
||||
sizeof(param) );
|
||||
|
||||
DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
|
||||
|
||||
switch( param.param ) {
|
||||
case R128_PARAM_IRQ_NR:
|
||||
value = dev->irq;
|
||||
break;
|
||||
default:
|
||||
return DRM_ERR(EINVAL);
|
||||
}
|
||||
|
||||
if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
|
||||
DRM_ERROR( "copy_to_user\n" );
|
||||
return DRM_ERR(EFAULT);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue