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modesetting-101: rename modeflags, as to avoid conflicts with the xorg definitions

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Maarten Maathuis 2008-07-06 10:52:25 +02:00
parent d495a6e28f
commit e810cb9243
15 changed files with 69 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
linux-core/drm_crtc_helper.c
View File

@ -38,7 +38,7 @@
static struct drm_display_mode std_mode[] = {
{ DRM_MODE("640x480", DRM_MODE_TYPE_DEFAULT, 25200, 640, 656,
752, 800, 0, 480, 490, 492, 525, 0,
V_NHSYNC | V_NVSYNC) }, /* 640x480@60Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
};
/**

40
linux-core/drm_edid.c
View File

@ -335,15 +335,15 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
drm_mode_set_name(mode);
if (pt->interlaced)
mode->flags |= V_INTERLACE;
mode->flags |= DRM_MODE_FLAG_INTERLACE;
if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
pt->hsync_positive = 1;
pt->vsync_positive = 1;
}
mode->flags |= pt->hsync_positive ? V_PHSYNC : V_NHSYNC;
mode->flags |= pt->vsync_positive ? V_PVSYNC : V_NVSYNC;
mode->flags |= pt->hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
mode->flags |= pt->vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
mode->width_mm = pt->width_mm_lo | (pt->width_mm_hi << 8);
mode->height_mm = pt->height_mm_lo | (pt->height_mm_hi << 8);
@ -367,55 +367,55 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
static struct drm_display_mode edid_est_modes[] = {
{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
968, 1056, 0, 600, 601, 605, 628, 0,
V_PHSYNC | V_PVSYNC) }, /* 800x600@60Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
896, 1024, 0, 600, 601, 603, 625, 0,
V_PHSYNC | V_PVSYNC) }, /* 800x600@56Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
720, 840, 0, 480, 481, 484, 500, 0,
V_NHSYNC | V_NVSYNC) }, /* 640x480@75Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
704, 832, 0, 480, 489, 491, 520, 0,
V_NHSYNC | V_NVSYNC) }, /* 640x480@72Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
768, 864, 0, 480, 483, 486, 525, 0,
V_NHSYNC | V_NVSYNC) }, /* 640x480@67Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
752, 800, 0, 480, 490, 492, 525, 0,
V_NHSYNC | V_NVSYNC) }, /* 640x480@60Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
846, 900, 0, 400, 421, 423, 449, 0,
V_NHSYNC | V_NVSYNC) }, /* 720x400@88Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
846, 900, 0, 400, 412, 414, 449, 0,
V_NHSYNC | V_PVSYNC) }, /* 720x400@70Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
V_PHSYNC | V_PVSYNC) }, /* 1280x1024@75Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
1136, 1312, 0, 768, 769, 772, 800, 0,
V_PHSYNC | V_PVSYNC) }, /* 1024x768@75Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1184, 1328, 0, 768, 771, 777, 806, 0,
V_NHSYNC | V_NVSYNC) }, /* 1024x768@70Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1184, 1344, 0, 768, 771, 777, 806, 0,
V_NHSYNC | V_NVSYNC) }, /* 1024x768@60Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
1208, 1264, 0, 768, 768, 776, 817, 0,
V_PHSYNC | V_PVSYNC | V_INTERLACE) }, /* 1024x768@43Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
928, 1152, 0, 624, 625, 628, 667, 0,
V_NHSYNC | V_NVSYNC) }, /* 832x624@75Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
896, 1056, 0, 600, 601, 604, 625, 0,
V_PHSYNC | V_PVSYNC) }, /* 800x600@75Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
976, 1040, 0, 600, 637, 643, 666, 0,
V_PHSYNC | V_PVSYNC) }, /* 800x600@72Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1344, 1600, 0, 864, 865, 868, 900, 0,
V_PHSYNC | V_PVSYNC) }, /* 1152x864@75Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
};
#define EDID_EST_TIMINGS 16

8
linux-core/drm_modes.c
View File

@ -162,9 +162,9 @@ int drm_mode_vrefresh(struct drm_display_mode *mode)
calc_val /= mode->vtotal;
refresh = calc_val;
if (mode->flags & V_INTERLACE)
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
refresh *= 2;
if (mode->flags & V_DBLSCAN)
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
refresh /= 2;
if (mode->vscan > 1)
refresh /= mode->vscan;
@ -198,7 +198,7 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
p->crtc_vsync_end = p->vsync_end;
p->crtc_vtotal = p->vtotal;
if (p->flags & V_INTERLACE) {
if (p->flags & DRM_MODE_FLAG_INTERLACE) {
if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
p->crtc_vdisplay /= 2;
p->crtc_vsync_start /= 2;
@ -209,7 +209,7 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
p->crtc_vtotal |= 1;
}
if (p->flags & V_DBLSCAN) {
if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
p->crtc_vdisplay *= 2;
p->crtc_vsync_start *= 2;
p->crtc_vsync_end *= 2;

4
linux-core/dvo_ch7xxx.c
View File

@ -289,10 +289,10 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
ch7xxx_readb(dvo, CH7xxx_IDF, &idf);
idf &= ~(CH7xxx_IDF_HSP | CH7xxx_IDF_VSP);
if (mode->flags & V_PHSYNC)
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
idf |= CH7xxx_IDF_HSP;
if (mode->flags & V_PVSYNC)
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
idf |= CH7xxx_IDF_HSP;
ch7xxx_writeb(dvo, CH7xxx_IDF, idf);

6
linux-core/intel_crt.c
View File

@ -74,7 +74,7 @@ static void intel_crt_restore(struct drm_connector *connector)
static int intel_crt_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
if (mode->flags & V_DBLSCAN)
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
if (mode->clock > 400000 || mode->clock < 25000)
@ -118,9 +118,9 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
}
adpa = 0;
if (adjusted_mode->flags & V_PHSYNC)
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
adpa |= ADPA_HSYNC_ACTIVE_HIGH;
if (adjusted_mode->flags & V_PVSYNC)
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
adpa |= ADPA_VSYNC_ACTIVE_HIGH;
if (intel_crtc->pipe == 0)

2
linux-core/intel_display.c
View File

@ -1112,7 +1112,7 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
/* VESA 640x480x72Hz mode to set on the pipe */
static struct drm_display_mode load_detect_mode = {
DRM_MODE("640x480", DRM_MODE_TYPE_DEFAULT, 31500, 640, 664,
704, 832, 0, 480, 489, 491, 520, 0, V_NHSYNC | V_NVSYNC),
704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
};
struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,

10
linux-core/intel_dvo.c
View File

@ -139,7 +139,7 @@ static int intel_dvo_mode_valid(struct drm_connector *connector,
struct intel_output *intel_output = to_intel_output(connector);
struct intel_dvo_device *dvo = intel_output->dev_priv;
if (mode->flags & V_DBLSCAN)
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
/* XXX: Validate clock range */
@ -225,9 +225,9 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
if (pipe == 1)
dvo_val |= DVO_PIPE_B_SELECT;
dvo_val |= DVO_PIPE_STALL;
if (adjusted_mode->flags & V_PHSYNC)
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
if (adjusted_mode->flags & V_PVSYNC)
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
@ -387,9 +387,9 @@ intel_dvo_get_current_mode (struct drm_connector *connector)
if (mode) {
mode->type |= DRM_MODE_TYPE_PREFERRED;
if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
mode->flags |= V_PHSYNC;
mode->flags |= DRM_MODE_FLAG_PHSYNC;
if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
mode->flags |= V_PVSYNC;
mode->flags |= DRM_MODE_FLAG_PVSYNC;
}
}
}

4
linux-core/intel_fb.c
View File

@ -263,8 +263,8 @@ static int intelfb_set_par(struct fb_info *info)
drm_mode->clock = PICOS2KHZ(var->pixclock);
drm_mode->vrefresh = drm_mode_vrefresh(drm_mode);
drm_mode->flags = 0;
drm_mode->flags |= var->sync & FB_SYNC_HOR_HIGH_ACT ? V_PHSYNC : V_NHSYNC;
drm_mode->flags |= var->sync & FB_SYNC_VERT_HIGH_ACT ? V_PVSYNC : V_NVSYNC;
drm_mode->flags |= var->sync & FB_SYNC_HOR_HIGH_ACT ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
drm_mode->flags |= var->sync & FB_SYNC_VERT_HIGH_ACT ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
drm_mode_set_name(drm_mode);
drm_mode_set_crtcinfo(drm_mode, CRTC_INTERLACE_HALVE_V);

6
linux-core/intel_sdvo.c
View File

@ -602,9 +602,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
((v_sync_len & 0x30) >> 4);
output_dtd.part2.dtd_flags = 0x18;
if (mode->flags & V_PHSYNC)
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
output_dtd.part2.dtd_flags |= 0x2;
if (mode->flags & V_PVSYNC)
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
output_dtd.part2.dtd_flags |= 0x4;
output_dtd.part2.sdvo_flags = 0;
@ -825,7 +825,7 @@ static int intel_sdvo_mode_valid(struct drm_connector *connector,
struct intel_output *intel_output = to_intel_output(connector);
struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
if (mode->flags & V_DBLSCAN)
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
if (sdvo_priv->pixel_clock_min > mode->clock)

10
linux-core/nv50_crtc.c
View File

@ -92,14 +92,14 @@ static int nv50_crtc_execute_mode(struct nv50_crtc *crtc)
vunk2a = 2*hw_mode->vtotal - hw_mode->vsync_start + hw_mode->vblank_start;
vunk2b = hw_mode->vtotal - hw_mode->vsync_start + hw_mode->vblank_end;
if (hw_mode->flags & V_INTERLACE) {
if (hw_mode->flags & DRM_MODE_FLAG_INTERLACE) {
vsync_dur /= 2;
vsync_start_to_end /= 2;
vunk1 /= 2;
vunk2a /= 2;
vunk2b /= 2;
/* magic */
if (hw_mode->flags & V_DBLSCAN) {
if (hw_mode->flags & DRM_MODE_FLAG_DBLSCAN) {
vsync_start_to_end -= 1;
vunk1 -= 1;
vunk2a -= 1;
@ -108,14 +108,14 @@ static int nv50_crtc_execute_mode(struct nv50_crtc *crtc)
}
OUT_MODE(NV50_CRTC0_CLOCK + offset, hw_mode->clock | 0x800000);
OUT_MODE(NV50_CRTC0_INTERLACE + offset, (hw_mode->flags & V_INTERLACE) ? 2 : 0);
OUT_MODE(NV50_CRTC0_INTERLACE + offset, (hw_mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 0);
OUT_MODE(NV50_CRTC0_DISPLAY_START + offset, 0);
OUT_MODE(NV50_CRTC0_UNK82C + offset, 0);
OUT_MODE(NV50_CRTC0_DISPLAY_TOTAL + offset, hw_mode->vtotal << 16 | hw_mode->htotal);
OUT_MODE(NV50_CRTC0_SYNC_DURATION + offset, (vsync_dur - 1) << 16 | (hsync_dur - 1));
OUT_MODE(NV50_CRTC0_SYNC_START_TO_BLANK_END + offset, (vsync_start_to_end - 1) << 16 | (hsync_start_to_end - 1));
OUT_MODE(NV50_CRTC0_MODE_UNK1 + offset, (vunk1 - 1) << 16 | (hunk1 - 1));
if (hw_mode->flags & V_INTERLACE) {
if (hw_mode->flags & DRM_MODE_FLAG_INTERLACE) {
OUT_MODE(NV50_CRTC0_MODE_UNK2 + offset, (vunk2b - 1) << 16 | (vunk2a - 1));
}
@ -273,7 +273,7 @@ static int nv50_crtc_set_scale(struct nv50_crtc *crtc)
/* Got a better name for SCALER_ACTIVE? */
/* One day i've got to really figure out why this is needed. */
if ((crtc->mode->flags & V_DBLSCAN) || (crtc->mode->flags & V_INTERLACE) ||
if ((crtc->mode->flags & DRM_MODE_FLAG_DBLSCAN) || (crtc->mode->flags & DRM_MODE_FLAG_INTERLACE) ||
crtc->mode->hdisplay != outX || crtc->mode->vdisplay != outY) {
OUT_MODE(NV50_CRTC0_SCALE_CTRL + offset, NV50_CRTC0_SCALE_CTRL_SCALER_ACTIVE);
} else {

4
linux-core/nv50_dac.c
View File

@ -73,10 +73,10 @@ static int nv50_dac_execute_mode(struct nv50_output *output, bool disconnect)
mode_ctl |= 0x100;
}
if (desired_mode->flags & V_NHSYNC)
if (desired_mode->flags & DRM_MODE_FLAG_NHSYNC)
mode_ctl2 |= NV50_DAC_MODE_CTRL2_NHSYNC;
if (desired_mode->flags & V_NVSYNC)
if (desired_mode->flags & DRM_MODE_FLAG_NVSYNC)
mode_ctl2 |= NV50_DAC_MODE_CTRL2_NVSYNC;
OUT_MODE(NV50_DAC0_MODE_CTRL + offset, mode_ctl);

4
linux-core/nv50_fbcon.c
View File

@ -239,8 +239,8 @@ static int nv50_fbcon_set_par(struct fb_info *info)
drm_mode->clock = PICOS2KHZ(var->pixclock);
drm_mode->vrefresh = drm_mode_vrefresh(drm_mode);
drm_mode->flags = 0;
drm_mode->flags |= var->sync & FB_SYNC_HOR_HIGH_ACT ? V_PHSYNC : V_NHSYNC;
drm_mode->flags |= var->sync & FB_SYNC_VERT_HIGH_ACT ? V_PVSYNC : V_NVSYNC;
drm_mode->flags |= var->sync & FB_SYNC_HOR_HIGH_ACT ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
drm_mode->flags |= var->sync & FB_SYNC_VERT_HIGH_ACT ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
drm_mode_set_name(drm_mode);
drm_mode_set_crtcinfo(drm_mode, CRTC_INTERLACE_HALVE_V);

4
linux-core/nv50_kms_wrapper.c
View File

@ -941,10 +941,10 @@ static void nv50_kms_connector_destroy(struct drm_connector *drm_connector)
static struct drm_display_mode std_mode[] = {
/*{ DRM_MODE("640x480", DRM_MODE_TYPE_DEFAULT, 25200, 640, 656,
752, 800, 0, 480, 490, 492, 525, 0,
V_NHSYNC | V_NVSYNC) },*/ /* 640x480@60Hz */
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },*/ /* 640x480@60Hz */
{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DEFAULT, 135000, 1280, 1296,
1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
V_PHSYNC | V_PVSYNC) }, /* 1280x1024@75Hz */
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
};
static void nv50_kms_connector_fill_modes(struct drm_connector *drm_connector, uint32_t maxX, uint32_t maxY)

4
linux-core/nv50_sor.c
View File

@ -77,10 +77,10 @@ static int nv50_sor_execute_mode(struct nv50_output *output, bool disconnect)
else
mode_ctl |= NV50_SOR_MODE_CTRL_CRTC0;
if (desired_mode->flags & V_NHSYNC)
if (desired_mode->flags & DRM_MODE_FLAG_NHSYNC)
mode_ctl |= NV50_SOR_MODE_CTRL_NHSYNC;
if (desired_mode->flags & V_NVSYNC)
if (desired_mode->flags & DRM_MODE_FLAG_NVSYNC)
mode_ctl |= NV50_SOR_MODE_CTRL_NVSYNC;
OUT_MODE(NV50_SOR0_MODE_CTRL + offset, mode_ctl);

29
shared-core/drm.h
View File

@ -1011,20 +1011,21 @@ struct drm_mm_info_arg {
#define DRM_MODE_TYPE_DRIVER (1<<6)
/* Video mode flags */
#define V_PHSYNC (1<<0)
#define V_NHSYNC (1<<1)
#define V_PVSYNC (1<<2)
#define V_NVSYNC (1<<3)
#define V_INTERLACE (1<<4)
#define V_DBLSCAN (1<<5)
#define V_CSYNC (1<<6)
#define V_PCSYNC (1<<7)
#define V_NCSYNC (1<<8)
#define V_HSKEW (1<<9) /* hskew provided */
#define V_BCAST (1<<10)
#define V_PIXMUX (1<<11)
#define V_DBLCLK (1<<12)
#define V_CLKDIV2 (1<<13)
/* bit compatible with the xorg definitions. */
#define DRM_MODE_FLAG_PHSYNC (1<<0)
#define DRM_MODE_FLAG_NHSYNC (1<<1)
#define DRM_MODE_FLAG_PVSYNC (1<<2)
#define DRM_MODE_FLAG_NVSYNC (1<<3)
#define DRM_MODE_FLAG_INTERLACE (1<<4)
#define DRM_MODE_FLAG_DBLSCAN (1<<5)
#define DRM_MODE_FLAG_CSYNC (1<<6)
#define DRM_MODE_FLAG_PCSYNC (1<<7)
#define DRM_MODE_FLAG_NCSYNC (1<<8)
#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST (1<<10)
#define DRM_MODE_FLAG_PIXMUX (1<<11)
#define DRM_MODE_FLAG_DBLCLK (1<<12)
#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
/* DPMS flags */
#define DPMSModeOn 0