Merged tdfx-2-1-branch

libdrm/xf86drm.c

@@ -502,6 +502,7 @@ int drmAddMap(int fd,
 
     map.offset  = offset;
 #ifdef __alpha__
+    /* Make sure we add the bus_base to all but shm */
     if (type != DRM_SHM) 
 	map.offset += BUS_BASE;
 #endif

linux-core/drmP.h

@@ -33,6 +33,12 @@
 #define _DRM_P_H_
 
 #ifdef __KERNEL__
+#ifdef __alpha__
+/* add include of current.h so that "current" is defined
+ * before static inline funcs in wait.h. Doing this so we
+ * can build the DRM (part of PI DRI). 4/21/2000 S + B */
+#include <asm/current.h>
+#endif /* __alpha__ */
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -47,6 +53,9 @@
 #include <linux/sched.h>
 #include <linux/smp_lock.h>	/* For (un)lock_kernel */
 #include <linux/mm.h>
+#ifdef __alpha__
+#include <asm/pgtable.h> /* For pte_wrprotect */
+#endif
 #include <asm/io.h>
 #include <asm/mman.h>
 #include <asm/uaccess.h>
@@ -147,6 +156,71 @@ typedef struct wait_queue *wait_queue_head_t;
 #ifndef __HAVE_ARCH_CMPXCHG
 				/* Include this here so that driver can be
                                    used with older kernels. */
+#if defined(__alpha__)
+static __inline__ unsigned long
+__cmpxchg_u32(volatile int *m, int old, int new)
+{
+	unsigned long prev, cmp;
+
+	__asm__ __volatile__(
+	"1:	ldl_l %0,%2\n"
+	"	cmpeq %0,%3,%1\n"
+	"	beq %1,2f\n"
+	"	mov %4,%1\n"
+	"	stl_c %1,%2\n"
+	"	beq %1,3f\n"
+	"2:	mb\n"
+	".subsection 2\n"
+	"3:	br 1b\n"
+	".previous"
+	: "=&r"(prev), "=&r"(cmp), "=m"(*m)
+	: "r"((long) old), "r"(new), "m"(*m));
+
+	return prev;
+}
+
+static __inline__ unsigned long
+__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
+{
+	unsigned long prev, cmp;
+
+	__asm__ __volatile__(
+	"1:	ldq_l %0,%2\n"
+	"	cmpeq %0,%3,%1\n"
+	"	beq %1,2f\n"
+	"	mov %4,%1\n"
+	"	stq_c %1,%2\n"
+	"	beq %1,3f\n"
+	"2:	mb\n"
+	".subsection 2\n"
+	"3:	br 1b\n"
+	".previous"
+	: "=&r"(prev), "=&r"(cmp), "=m"(*m)
+	: "r"((long) old), "r"(new), "m"(*m));
+
+	return prev;
+}
+
+static __inline__ unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+	switch (size) {
+		case 4:
+			return __cmpxchg_u32(ptr, old, new);
+		case 8:
+			return __cmpxchg_u64(ptr, old, new);
+	}
+	return old;
+}
+#define cmpxchg(ptr,o,n)						 \
+  ({									 \
+     __typeof__(*(ptr)) _o_ = (o);					 \
+     __typeof__(*(ptr)) _n_ = (n);					 \
+     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,		 \
+				    (unsigned long)_n_, sizeof(*(ptr))); \
+  })
+
+#elif __i386__
 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 				      unsigned long new, int size)
 {
@@ -177,6 +251,7 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 #define cmpxchg(ptr,o,n)						\
   ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),		\
 				 (unsigned long)(n),sizeof(*(ptr))))
+#endif /* i386 & alpha */
 #endif
 
 				/* Macros to make printk easier */

linux/Makefile.linux

@@ -126,6 +126,7 @@ SIS := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \
 	| grep -s 'SIS = ' | cut -d' ' -f3)
 PARAMS := $(shell if fgrep kill_fasync $(TREE)/linux/fs.h \
 	| egrep -q '(band|int, int)'; then echo 3; else echo 2; fi)
+MACHINE := $(shell echo `uname -m`)
 ifeq ($(AGP),0)
 AGP := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \
 	| grep -s 'AGP_MODULE = ' | cut -d' ' -f3)
@@ -134,7 +135,11 @@ endif
 ifeq ($(AGP),1)
 MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
 DRMOBJS += agpsupport.o
-MODS += mga.o i810.o
+MODS += mga.o
+ifeq ($(MACHINE),i386)
+MODS += i810.o
+endif
+
 
 MGAOBJS=	mga_drv.o mga_dma.o mga_bufs.o mga_state.o mga_context.o
 MGAHEADERS=	mga_drv.h $(DRMHEADERS)
@@ -159,6 +164,7 @@ endif
 all::;@echo === KERNEL HEADERS IN $(TREE)
 all::;@echo === SMP=${SMP} MODVERSIONS=${MODVERSIONS} AGP=${AGP} SIS=${SIS}
 all::;@echo === kill_fasync has $(PARAMS) parameters
+all::;@echo === Compiling for machine $(MACHINE)
 all:: $(LIBS) $(MODS) $(PROGS)
 endif
 

linux/drmP.h

@@ -33,6 +33,12 @@
 #define _DRM_P_H_
 
 #ifdef __KERNEL__
+#ifdef __alpha__
+/* add include of current.h so that "current" is defined
+ * before static inline funcs in wait.h. Doing this so we
+ * can build the DRM (part of PI DRI). 4/21/2000 S + B */
+#include <asm/current.h>
+#endif /* __alpha__ */
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -47,6 +53,9 @@
 #include <linux/sched.h>
 #include <linux/smp_lock.h>	/* For (un)lock_kernel */
 #include <linux/mm.h>
+#ifdef __alpha__
+#include <asm/pgtable.h> /* For pte_wrprotect */
+#endif
 #include <asm/io.h>
 #include <asm/mman.h>
 #include <asm/uaccess.h>
@@ -147,6 +156,71 @@ typedef struct wait_queue *wait_queue_head_t;
 #ifndef __HAVE_ARCH_CMPXCHG
 				/* Include this here so that driver can be
                                    used with older kernels. */
+#if defined(__alpha__)
+static __inline__ unsigned long
+__cmpxchg_u32(volatile int *m, int old, int new)
+{
+	unsigned long prev, cmp;
+
+	__asm__ __volatile__(
+	"1:	ldl_l %0,%2\n"
+	"	cmpeq %0,%3,%1\n"
+	"	beq %1,2f\n"
+	"	mov %4,%1\n"
+	"	stl_c %1,%2\n"
+	"	beq %1,3f\n"
+	"2:	mb\n"
+	".subsection 2\n"
+	"3:	br 1b\n"
+	".previous"
+	: "=&r"(prev), "=&r"(cmp), "=m"(*m)
+	: "r"((long) old), "r"(new), "m"(*m));
+
+	return prev;
+}
+
+static __inline__ unsigned long
+__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
+{
+	unsigned long prev, cmp;
+
+	__asm__ __volatile__(
+	"1:	ldq_l %0,%2\n"
+	"	cmpeq %0,%3,%1\n"
+	"	beq %1,2f\n"
+	"	mov %4,%1\n"
+	"	stq_c %1,%2\n"
+	"	beq %1,3f\n"
+	"2:	mb\n"
+	".subsection 2\n"
+	"3:	br 1b\n"
+	".previous"
+	: "=&r"(prev), "=&r"(cmp), "=m"(*m)
+	: "r"((long) old), "r"(new), "m"(*m));
+
+	return prev;
+}
+
+static __inline__ unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+	switch (size) {
+		case 4:
+			return __cmpxchg_u32(ptr, old, new);
+		case 8:
+			return __cmpxchg_u64(ptr, old, new);
+	}
+	return old;
+}
+#define cmpxchg(ptr,o,n)						 \
+  ({									 \
+     __typeof__(*(ptr)) _o_ = (o);					 \
+     __typeof__(*(ptr)) _n_ = (n);					 \
+     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,		 \
+				    (unsigned long)_n_, sizeof(*(ptr))); \
+  })
+
+#elif __i386__
 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 				      unsigned long new, int size)
 {
@@ -177,6 +251,7 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 #define cmpxchg(ptr,o,n)						\
   ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),		\
 				 (unsigned long)(n),sizeof(*(ptr))))
+#endif /* i386 & alpha */
 #endif
 
 				/* Macros to make printk easier */

linux/mga_dma.c

@@ -416,7 +416,9 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
 		}
 	}
 
+#ifdef __i386__
    	mga_flush_write_combine();
+#endif
     	atomic_inc(&dev_priv->pending_bufs);
        	MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
  	MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
@@ -814,7 +816,9 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
 		 * the status register will be correct
 		 */
 	   
+#ifdef __i386__
 		mga_flush_write_combine();
+#endif
 	   	MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
 
 		MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |

linux/mga_drv.h

@@ -295,7 +295,7 @@ drm_mga_prim_buf_t *tmp_buf = 					\
 		       num_dwords + 1 + outcount, ADRINDEX(reg), val);	\
 	if( ++outcount == 4) {						\
 		outcount = 0;						\
-		dma_ptr[0] = *(u32 *)tempIndex;				\
+		dma_ptr[0] = *(unsigned long *)tempIndex;		\
 		dma_ptr+=5;						\
 		num_dwords += 5;					\
 	}								\

linux/mga_state.c

@@ -218,8 +218,8 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 
 	/* This takes 25 dwords */
 
-	PRIMOUTREG(MGAREG_TEXCTL2,
+	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 
-		   regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
+		   0x00008000);
 	PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
 	PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
 	PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
@@ -873,7 +873,9 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 			       clear.clear_color_mask,
 			       clear.clear_depth_mask);
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -903,7 +905,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	PRIMUPDATE(dev_priv);
 	set_bit(MGA_BUF_SWAP_PENDING,
 		&dev_priv->current_prim->buffer_status);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -951,7 +955,9 @@ int mga_iload(struct inode *inode, struct file *filp,
 	AGEBUF(dev_priv, buf_priv);
 	buf_priv->discard = 1;
 	mga_freelist_put(dev, buf);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -999,7 +1005,9 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	mga_dma_dispatch_vertex(dev, buf);
 
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -1046,7 +1054,9 @@ int mga_indices(struct inode *inode, struct file *filp,
 	mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
 
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }

linux/r128_dma.c

@@ -480,8 +480,10 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
 		   dev_priv->ring_start,
 		   write * sizeof(u32));
 
+#ifdef __i386__
 	/* Make sure WC cache has been flushed */
 	r128_flush_write_combine();
+#endif
 
 	dev_priv->sarea_priv->ring_write = write;
 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -583,8 +585,10 @@ static int r128_submit_packets_ring(drm_device_t *dev,
 		   dev_priv->ring_start,
 		   write * sizeof(u32));
 
+#ifdef __i386__
 	/* Make sure WC cache has been flushed */
 	r128_flush_write_combine();
+#endif
 
 	dev_priv->sarea_priv->ring_write = write;
 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -752,8 +756,10 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
 		r128_mark_vertbufs_done(dev);
 	}
 
+#ifdef __i386__
 	/* Make sure WC cache has been flushed (if in PIO mode) */
 	if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
+#endif
 
 	/* FIXME: Add support for sending vertex buffer to the CCE here
 	   instead of in client code.  The v->prim holds the primitive