Merged tdfx-2-1-branch
parent
7db6449142
commit
f1bb3c5f5f
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@ -502,6 +502,7 @@ int drmAddMap(int fd,
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map.offset = offset;
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#ifdef __alpha__
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/* Make sure we add the bus_base to all but shm */
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if (type != DRM_SHM)
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map.offset += BUS_BASE;
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#endif
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@ -33,6 +33,12 @@
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#define _DRM_P_H_
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#ifdef __KERNEL__
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#ifdef __alpha__
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/* add include of current.h so that "current" is defined
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* before static inline funcs in wait.h. Doing this so we
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* can build the DRM (part of PI DRI). 4/21/2000 S + B */
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#include <asm/current.h>
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#endif /* __alpha__ */
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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@ -47,6 +53,9 @@
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#include <linux/sched.h>
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#include <linux/smp_lock.h> /* For (un)lock_kernel */
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#include <linux/mm.h>
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#ifdef __alpha__
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#include <asm/pgtable.h> /* For pte_wrprotect */
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#endif
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#include <asm/io.h>
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#include <asm/mman.h>
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#include <asm/uaccess.h>
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@ -147,6 +156,71 @@ typedef struct wait_queue *wait_queue_head_t;
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#ifndef __HAVE_ARCH_CMPXCHG
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/* Include this here so that driver can be
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used with older kernels. */
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#if defined(__alpha__)
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static __inline__ unsigned long
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__cmpxchg_u32(volatile int *m, int old, int new)
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{
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unsigned long prev, cmp;
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__asm__ __volatile__(
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"1: ldl_l %0,%2\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stl_c %1,%2\n"
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" beq %1,3f\n"
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"2: mb\n"
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m));
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
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{
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unsigned long prev, cmp;
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__asm__ __volatile__(
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"1: ldq_l %0,%2\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stq_c %1,%2\n"
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" beq %1,3f\n"
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"2: mb\n"
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m));
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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case 8:
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return __cmpxchg_u64(ptr, old, new);
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}
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return old;
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}
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#define cmpxchg(ptr,o,n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#elif __i386__
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static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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unsigned long new, int size)
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{
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@ -177,6 +251,7 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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#define cmpxchg(ptr,o,n) \
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((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o), \
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(unsigned long)(n),sizeof(*(ptr))))
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#endif /* i386 & alpha */
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#endif
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/* Macros to make printk easier */
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@ -126,6 +126,7 @@ SIS := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \
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| grep -s 'SIS = ' | cut -d' ' -f3)
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PARAMS := $(shell if fgrep kill_fasync $(TREE)/linux/fs.h \
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| egrep -q '(band|int, int)'; then echo 3; else echo 2; fi)
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MACHINE := $(shell echo `uname -m`)
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ifeq ($(AGP),0)
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AGP := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \
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| grep -s 'AGP_MODULE = ' | cut -d' ' -f3)
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@ -134,7 +135,11 @@ endif
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ifeq ($(AGP),1)
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MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
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DRMOBJS += agpsupport.o
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MODS += mga.o i810.o
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MODS += mga.o
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ifeq ($(MACHINE),i386)
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MODS += i810.o
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endif
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MGAOBJS= mga_drv.o mga_dma.o mga_bufs.o mga_state.o mga_context.o
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MGAHEADERS= mga_drv.h $(DRMHEADERS)
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@ -159,6 +164,7 @@ endif
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all::;@echo === KERNEL HEADERS IN $(TREE)
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all::;@echo === SMP=${SMP} MODVERSIONS=${MODVERSIONS} AGP=${AGP} SIS=${SIS}
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all::;@echo === kill_fasync has $(PARAMS) parameters
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all::;@echo === Compiling for machine $(MACHINE)
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all:: $(LIBS) $(MODS) $(PROGS)
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endif
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75
linux/drmP.h
75
linux/drmP.h
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@ -33,6 +33,12 @@
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#define _DRM_P_H_
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#ifdef __KERNEL__
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#ifdef __alpha__
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/* add include of current.h so that "current" is defined
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* before static inline funcs in wait.h. Doing this so we
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* can build the DRM (part of PI DRI). 4/21/2000 S + B */
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#include <asm/current.h>
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#endif /* __alpha__ */
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/smp_lock.h> /* For (un)lock_kernel */
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#include <linux/mm.h>
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#ifdef __alpha__
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#include <asm/pgtable.h> /* For pte_wrprotect */
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#endif
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#include <asm/io.h>
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#include <asm/mman.h>
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#include <asm/uaccess.h>
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@ -147,6 +156,71 @@ typedef struct wait_queue *wait_queue_head_t;
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#ifndef __HAVE_ARCH_CMPXCHG
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/* Include this here so that driver can be
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used with older kernels. */
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#if defined(__alpha__)
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static __inline__ unsigned long
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__cmpxchg_u32(volatile int *m, int old, int new)
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{
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unsigned long prev, cmp;
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__asm__ __volatile__(
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"1: ldl_l %0,%2\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stl_c %1,%2\n"
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" beq %1,3f\n"
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"2: mb\n"
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m));
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
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{
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unsigned long prev, cmp;
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__asm__ __volatile__(
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"1: ldq_l %0,%2\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stq_c %1,%2\n"
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" beq %1,3f\n"
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"2: mb\n"
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m));
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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case 8:
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return __cmpxchg_u64(ptr, old, new);
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}
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return old;
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}
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#define cmpxchg(ptr,o,n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#elif __i386__
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static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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unsigned long new, int size)
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{
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#define cmpxchg(ptr,o,n) \
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((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o), \
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(unsigned long)(n),sizeof(*(ptr))))
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#endif /* i386 & alpha */
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#endif
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/* Macros to make printk easier */
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@ -416,7 +416,9 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
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}
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}
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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atomic_inc(&dev_priv->pending_bufs);
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MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
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MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
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* the status register will be correct
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*/
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
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MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
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@ -295,7 +295,7 @@ drm_mga_prim_buf_t *tmp_buf = \
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num_dwords + 1 + outcount, ADRINDEX(reg), val); \
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if( ++outcount == 4) { \
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outcount = 0; \
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dma_ptr[0] = *(u32 *)tempIndex; \
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dma_ptr[0] = *(unsigned long *)tempIndex; \
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dma_ptr+=5; \
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num_dwords += 5; \
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} \
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@ -218,8 +218,8 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
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/* This takes 25 dwords */
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PRIMOUTREG(MGAREG_TEXCTL2,
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regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
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PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable |
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0x00008000);
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PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
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PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
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PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
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@ -873,7 +873,9 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
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clear.clear_color_mask,
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clear.clear_depth_mask);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -903,7 +905,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
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PRIMUPDATE(dev_priv);
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set_bit(MGA_BUF_SWAP_PENDING,
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&dev_priv->current_prim->buffer_status);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -951,7 +955,9 @@ int mga_iload(struct inode *inode, struct file *filp,
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AGEBUF(dev_priv, buf_priv);
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buf_priv->discard = 1;
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mga_freelist_put(dev, buf);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -999,7 +1005,9 @@ int mga_vertex(struct inode *inode, struct file *filp,
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mga_dma_dispatch_vertex(dev, buf);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -1046,7 +1054,9 @@ int mga_indices(struct inode *inode, struct file *filp,
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mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -480,8 +480,10 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
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dev_priv->ring_start,
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write * sizeof(u32));
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#ifdef __i386__
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/* Make sure WC cache has been flushed */
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r128_flush_write_combine();
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#endif
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dev_priv->sarea_priv->ring_write = write;
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R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
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@ -583,8 +585,10 @@ static int r128_submit_packets_ring(drm_device_t *dev,
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dev_priv->ring_start,
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write * sizeof(u32));
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#ifdef __i386__
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/* Make sure WC cache has been flushed */
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r128_flush_write_combine();
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#endif
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dev_priv->sarea_priv->ring_write = write;
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R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
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@ -752,8 +756,10 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
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r128_mark_vertbufs_done(dev);
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}
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#ifdef __i386__
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/* Make sure WC cache has been flushed (if in PIO mode) */
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if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
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#endif
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/* FIXME: Add support for sending vertex buffer to the CCE here
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instead of in client code. The v->prim holds the primitive
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Reference in New Issue