intel: Add initial support for Sandybridge, and clean up the #defines.
parent
c27ce8674d
commit
f6dc964e1d
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@ -210,11 +210,11 @@ drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size,
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return size;
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/* 965+ just need multiples of page size for tiling */
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if (IS_I965G(bufmgr_gem))
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if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
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return ROUND_UP_TO(size, 4096);
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/* Older chips need powers of two, of at least 512k or 1M */
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if (IS_I9XX(bufmgr_gem)) {
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if (!IS_GEN2(bufmgr_gem)) {
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min_size = 1024*1024;
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max_size = 128*1024*1024;
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} else {
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@ -249,7 +249,7 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
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return ROUND_UP_TO(pitch, tile_width);
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/* 965 is flexible */
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if (IS_I965G(bufmgr_gem))
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if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
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return ROUND_UP_TO(pitch, tile_width);
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/* Pre-965 needs power of two tile width */
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@ -382,7 +382,8 @@ drm_intel_bo_gem_set_in_aperture_size(drm_intel_bufmgr_gem *bufmgr_gem,
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* aperture. Optimal packing is for wimps.
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*/
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size = bo_gem->bo.size;
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if (!IS_I965G(bufmgr_gem) && bo_gem->tiling_mode != I915_TILING_NONE)
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if ((IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem))
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&& bo_gem->tiling_mode != I915_TILING_NONE)
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size *= 2;
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bo_gem->reloc_tree_size = size;
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@ -1756,7 +1757,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
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fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value);
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}
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if (!IS_I965G(bufmgr_gem)) {
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if (IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem)) {
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gp.param = I915_PARAM_NUM_FENCES_AVAIL;
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gp.value = &bufmgr_gem->available_fences;
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ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
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@ -28,50 +28,74 @@
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#ifndef _INTEL_CHIPSET_H
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#define _INTEL_CHIPSET_H
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#define IS_I830(dev) ((dev)->pci_device == 0x3577)
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#define IS_845G(dev) ((dev)->pci_device == 0x2562)
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#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
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#define IS_I855(dev) ((dev)->pci_device == 0x3582)
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#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
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#define IS_830(dev) ((dev)->pci_device == 0x3577)
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#define IS_845(dev) ((dev)->pci_device == 0x2562)
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#define IS_85X(dev) ((dev)->pci_device == 0x3582)
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#define IS_865(dev) ((dev)->pci_device == 0x2572)
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#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
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#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
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#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
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#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
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#define IS_GEN2(dev) (IS_830(dev) || \
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IS_845(dev) || \
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IS_85X(dev) || \
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IS_865(dev))
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#define IS_915G(dev) ((dev)->pci_device == 0x2582 || \
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(dev)->pci_device == 0x258a)
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#define IS_915GM(dev) ((dev)->pci_device == 0x2592)
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#define IS_945G(dev) ((dev)->pci_device == 0x2772)
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#define IS_945GM(dev) ((dev)->pci_device == 0x27A2 || \
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(dev)->pci_device == 0x27AE)
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#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
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(dev)->pci_device == 0x2982 || \
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(dev)->pci_device == 0x2992 || \
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(dev)->pci_device == 0x29A2 || \
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(dev)->pci_device == 0x2A02 || \
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(dev)->pci_device == 0x2A12 || \
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(dev)->pci_device == 0x2A42 || \
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(dev)->pci_device == 0x2E02 || \
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(dev)->pci_device == 0x2E12 || \
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(dev)->pci_device == 0x2E22 || \
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(dev)->pci_device == 0x2E32 || \
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(dev)->pci_device == 0x2E42 || \
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(dev)->pci_device == 0x0042 || \
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(dev)->pci_device == 0x0046)
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#define IS_915(dev) (IS_915G(dev) || \
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IS_915GM(dev))
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#define IS_945(dev) (IS_945G(dev) || \
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IS_945GM(dev) || \
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IS_G33(dev) || \
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IS_PINEVIEW(dev))
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#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
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(dev)->pci_device == 0x29B2 || \
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(dev)->pci_device == 0x29D2)
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#define IS_PINEVIEW(dev) ((dev)->pci_device == 0xa001 || \
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(dev)->pci_device == 0xa011)
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#define IS_GEN3(dev) (IS_915(dev) || \
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IS_945(dev) || \
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IS_G33(dev) || \
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IS_PINEVIEW(dev))
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#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
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#define IS_GEN4(dev) ((dev)->pci_device == 0x2972 || \
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(dev)->pci_device == 0x2982 || \
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(dev)->pci_device == 0x2992 || \
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(dev)->pci_device == 0x29A2 || \
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(dev)->pci_device == 0x2A02 || \
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(dev)->pci_device == 0x2A12 || \
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(dev)->pci_device == 0x2A42 || \
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(dev)->pci_device == 0x2E02 || \
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(dev)->pci_device == 0x2E12 || \
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(dev)->pci_device == 0x2E22 || \
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(dev)->pci_device == 0x2E32 || \
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(dev)->pci_device == 0x2E42 || \
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(dev)->pci_device == 0x0042 || \
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(dev)->pci_device == 0x0046 || \
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IS_965GM(dev) || \
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IS_G4X(dev))
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#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
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#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
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(dev)->pci_device == 0x2E12 || \
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(dev)->pci_device == 0x2E22 || \
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(dev)->pci_device == 0x2E32 || \
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(dev)->pci_device == 0x2E42)
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(dev)->pci_device == 0x2E42 || \
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IS_GM45(dev))
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#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
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(dev)->pci_device == 0x29B2 || \
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(dev)->pci_device == 0x29D2)
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#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
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IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
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#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
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IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
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#define IS_9XX(dev) (IS_GEN3(dev) || \
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IS_GEN4(dev) || \
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IS_GEN5(dev) || \
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IS_GEN6(dev))
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#endif /* _INTEL_CHIPSET_H */
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